Searched refs:RCU_PLLSRC_IRC8M_DIV2 (Results 1 – 8 of 8) sorted by relevance
347 RCU_CFG0 |= (RCU_PLLSRC_IRC8M_DIV2 | (RCU_PLL_MUL18 & (~RCU_CFG1_PLLMF5))); in system_clock_72m_irc8m()480 RCU_CFG0 |= (RCU_PLLSRC_IRC8M_DIV2 | (RCU_PLL_MUL21 & (~RCU_CFG1_PLLMF5))); in system_clock_84m_irc8m()571 RCU_CFG0 |= (RCU_PLLSRC_IRC8M_DIV2 | (RCU_PLL_MUL24 & (~RCU_CFG1_PLLMF5))); in system_clock_96m_irc8m()708 RCU_CFG0 |= (RCU_PLLSRC_IRC8M_DIV2 | (RCU_PLL_MUL27 & (~RCU_CFG1_PLLMF5))); in system_clock_108m_irc8m()
213 if(RCU_PLLSRC_IRC8M_DIV2 == pllsel){ in SystemCoreClockUpdate()
474 #define RCU_PLLSRC_IRC8M_DIV2 ((uint32_t)0x00000000U) /*!< IRC8M/2 clock sele… macro
539 #define RCU_PLLSRC_IRC8M_DIV2 ((uint32_t)0x00000000U) /*!< IRC8M/2 clock is … macro
528 #define RCU_PLLSRC_IRC8M_DIV2 ((uint32_t)0x00000000U) /*!< PLL clock source select IRC8… macro
555 #define RCU_PLLSRC_IRC8M_DIV2 ((uint32_t)0x00000000U) /*!< IRC8M/2 clock sele… macro
562 #define RCU_PLLSRC_IRC8M_DIV2 ((uint32_t)0x00000000U) /*!< IRC8M/2 clock sele… macro
878 #define RCU_PLLSRC_IRC8M_DIV2 ((uint32_t)0x00000000U) /*!< IRC8M/2 clock sele… macro
