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Searched refs:RCU_GPIOFRST (Results 1 – 12 of 12) sorted by relevance

/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_gpio.c70 rcu_periph_reset_enable(RCU_GPIOFRST); in gpio_deinit()
71 rcu_periph_reset_disable(RCU_GPIOFRST); in gpio_deinit()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_gpio.c78 rcu_periph_reset_enable(RCU_GPIOFRST); in gpio_deinit()
79 rcu_periph_reset_disable(RCU_GPIOFRST); in gpio_deinit()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_gpio.c75 rcu_periph_reset_enable(RCU_GPIOFRST); in gpio_deinit()
76 rcu_periph_reset_disable(RCU_GPIOFRST); in gpio_deinit()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_gpio.c72 rcu_periph_reset_enable(RCU_GPIOFRST); in gpio_deinit()
73 rcu_periph_reset_disable(RCU_GPIOFRST); in gpio_deinit()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_gpio.c85 rcu_periph_reset_enable(RCU_GPIOFRST); in gpio_deinit()
86 rcu_periph_reset_disable(RCU_GPIOFRST); in gpio_deinit()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_gpio.c85 rcu_periph_reset_enable(RCU_GPIOFRST); in gpio_deinit()
86 rcu_periph_reset_disable(RCU_GPIOFRST); in gpio_deinit()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_rcu.h337RCU_GPIOFRST = RCU_REGIDX_BIT(AHBRST_REG_OFFSET, 22U), /*!< GPIOF clock reset */ enumerator
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_rcu.h349 RCU_GPIOFRST = RCU_REGIDX_BIT(IDX_AHBRST, 22U), /*!< GPIOF reset */ enumerator
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_rcu.h410RCU_GPIOFRST = RCU_REGIDX_BIT(APB2RST_REG_OFFSET, 7U), /*!< GPIOF clock reset */ enumerator
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_rcu.h355 RCU_GPIOFRST = RCU_REGIDX_BIT(AHBRST_REG_OFFSET, 22U), /*!< GPIOF reset */ enumerator
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_rcu.h666RCU_GPIOFRST = RCU_REGIDX_BIT(AHB1RST_REG_OFFSET, 5U), /*!< GPIOF clock reset */ enumerator
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_rcu.h686RCU_GPIOFRST = RCU_REGIDX_BIT(APB2RST_REG_OFFSET, 7U), /*!< GPIOF clock reset */ enumerator