RCU_CFG1_PREDV0 (reference) in projects: hal_gigadevice-latest

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Searched refs:RCU_CFG1_PREDV0 (Results 1 – 12 of 12) sorted by relevance

/hal_gigadevice-latest/gd32vf103/riscv/source/
D	system_gd32vf103.c	231 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in SystemCoreClockUpdate() 348 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_24m_hxtal() 358 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV0); in system_clock_24m_hxtal() 419 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_36m_hxtal() 429 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV0); in system_clock_36m_hxtal() 491 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_48m_hxtal() 501 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV0); in system_clock_48m_hxtal() 565 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_56m_hxtal() 575 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV0); in system_clock_56m_hxtal() 638 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_72m_hxtal() [all …]
/hal_gigadevice-latest/gd32e50x/cmsis/gd/gd32e50x/source/
D	system_gd32e50x.c	595 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_72m_hxtal() 610 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_72m_hxtal() 699 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_120m_hxtal() 714 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_120m_hxtal() 804 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_168m_hxtal() 819 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_168m_hxtal() 909 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_180m_hxtal() 924 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_180m_hxtal() 1022 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32f403/cmsis/gd/gd32f403/source/
D	system_gd32f403.c	625 RCU_CFG0 &= ~RCU_CFG1_PREDV0; in system_clock_168m_irc48m() 742 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_48m_hxtal() 819 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_72m_hxtal() 897 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_108m_hxtal() 975 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_120m_hxtal() 1053 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_168m_hxtal() 1137 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32e10x/cmsis/gd/gd32e10x/source/
D	system_gd32e10x.c	540 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_48m_hxtal() 611 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_72m_hxtal() 683 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_108m_hxtal() 754 …= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CFG1_PREDV0); in system_clock_120m_hxtal() 836 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
D	gd32vf103_rcu.c	`68 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PLL2MF \| in rcu_deinit() 403 reg &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PREDV0); in rcu_predv0_config() 1046 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in rcu_clock_freq_get()`
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
D	gd32e50x_rcu.c	`108 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PLL2MF \| in rcu_deinit() 117 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PLL2MF \| in rcu_deinit() 536 reg &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PREDV0); in rcu_predv0_config() 1498 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in rcu_clock_freq_get()`
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
D	gd32f403_rcu.c	`85 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PLL2MF \| in rcu_deinit() 449 reg &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PREDV0); in rcu_predv0_config() 1186 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in rcu_clock_freq_get()`
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
D	gd32e10x_rcu.c	`93 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 \| RCU_CFG1_PREDV1 \| RCU_CFG1_PLL1MF \| RCU_CFG1_PLL2MF \| in rcu_deinit() 452 reg &= ~(RCU_CFG1_PREDV0SEL \| RCU_CFG1_PREDV0); in rcu_predv0_config() 1189 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in rcu_clock_freq_get()`
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
D	gd32vf103_rcu.h	`221 #define RCU_CFG1_PREDV0 BITS(0,3) /!< PREDV0 division factor / macro`
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
D	gd32e10x_rcu.h	`237 #define RCU_CFG1_PREDV0 BITS(0,3) /!< PREDV0 division factor / macro`
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
D	gd32f403_rcu.h	`243 #define RCU_CFG1_PREDV0 BITS(0,3) /!< PREDV0 division factor / macro`
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
D	gd32e50x_rcu.h	`417 #define RCU_CFG1_PREDV0 BITS(0,3) /!< PREDV0 division factor / macro`

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