RCU_CFG1_PLLPRESEL (reference) in projects: hal_gigadevice-latest

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Searched refs:RCU_CFG1_PLLPRESEL (Results 1 – 13 of 13) sorted by relevance

/hal_gigadevice-latest/gd32f3x0/cmsis/gd/gd32f3x0/source/
D	system_gd32f3x0.c	182 RCU_CFG1 &= ~(RCU_CFG1_PREDV \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PLLPRESEL); in SystemInit() 308 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_72m_hxtal() 346 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_72m_irc8m() 388 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_72m_irc48m() 442 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_84m_hxtal() 479 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_84m_irc8m() 532 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_96m_hxtal() 570 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_96m_irc8m() 613 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_96m_irc48m() 669 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PREDV); in system_clock_108m_hxtal() [all …]
/hal_gigadevice-latest/gd32e50x/cmsis/gd/gd32e50x/source/
D	system_gd32e50x.c	595 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_72m_hxtal() 610 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_72m_hxtal() 699 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_120m_hxtal() 714 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_120m_hxtal() 804 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_168m_hxtal() 819 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_168m_hxtal() 909 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_180m_hxtal() 924 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_180m_hxtal() 995 pllpresel = (RCU_CFG1 & RCU_CFG1_PLLPRESEL); in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32f403/cmsis/gd/gd32f403/source/
D	system_gd32f403.c	622 RCU_CFG1 \|= RCU_CFG1_PLLPRESEL; in system_clock_168m_irc48m() 742 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_48m_hxtal() 819 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_72m_hxtal() 897 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_108m_hxtal() 975 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_120m_hxtal() 1053 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_168m_hxtal() 1117 pllpresel = (RCU_CFG1 & RCU_CFG1_PLLPRESEL); in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32e10x/cmsis/gd/gd32e10x/source/
D	system_gd32e10x.c	540 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_48m_hxtal() 611 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_72m_hxtal() 683 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_108m_hxtal() 754 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL \| RCU_CFG1_PREDV0SEL \| RCU_CFG1_PLL1MF \| RCU_CFG1_PREDV1 \| RCU_CF… in system_clock_120m_hxtal() 816 pllpresel = (RCU_CFG1 & RCU_CFG1_PLLPRESEL); in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
D	gd32e50x_rcu.c	`100 RCU_CFG1 &= ~(RCU_CFG1_ADCPSC_3 \| RCU_CFG1_PLLPRESEL); in rcu_deinit() 110 RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLL2MF_4); in rcu_deinit() 119 RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLL2MF_4); in rcu_deinit() 489 reg &= ~RCU_CFG1_PLLPRESEL; in rcu_pllpresel_config() 1471 pllpresel = (RCU_CFG1 & RCU_CFG1_PLLPRESEL); in rcu_clock_freq_get()`
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
D	gd32f403_rcu.c	`87 RCU_CFG1_PLLPRESEL \| RCU_CFG1_PLL2MF_4); in rcu_deinit() 425 reg &= ~RCU_CFG1_PLLPRESEL; in rcu_pllpresel_config() 1166 pllpresel = (RCU_CFG1 & RCU_CFG1_PLLPRESEL); in rcu_clock_freq_get()`
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
D	gd32e10x_rcu.c	`95 RCU_CFG1_PLLPRESEL); in rcu_deinit() 428 reg &= ~RCU_CFG1_PLLPRESEL; in rcu_pllpresel_config() 1169 pllpresel = (RCU_CFG1 & RCU_CFG1_PLLPRESEL); in rcu_clock_freq_get()`
D	gd32e10x_spi.c	`281 if(0U != (RCU_CFG1_PLLPRESEL & RCU_CFG1)){ in i2s_psc_config()`
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
D	gd32f3x0_rcu.c	`69 RCU_CFG1 &= ~(RCU_CFG1_PREDV \| RCU_CFG1_PLLMF5 \| RCU_CFG1_PLLPRESEL); in rcu_deinit() 466 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL); in rcu_pll_preselection_config()`
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
D	gd32f3x0_rcu.h	`212 #define RCU_CFG1_PLLPRESEL BIT(30) /!< PLL clock source preselection / macro 533 #define RCU_PLLPRESEL_IRC48M RCU_CFG1_PLLPRESEL /*!< PLL clock source preselectio…`
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
D	gd32e10x_rcu.h	`245 #define RCU_CFG1_PLLPRESEL BIT(30) /!< PLL clock source selection / macro 708 #define RCU_PLLPRESRC_IRC48M RCU_CFG1_PLLPRESEL /*!< CK_PLL selected as…`
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
D	gd32f403_rcu.h	`251 #define RCU_CFG1_PLLPRESEL BIT(30) /!< PLL clock source selection / macro 766 #define RCU_PLLPRESRC_IRC48M RCU_CFG1_PLLPRESEL /*!< CK_PLL selected as…`
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
D	gd32e50x_rcu.h	`432 #define RCU_CFG1_PLLPRESEL BIT(30) /!< PLL clock source selection / macro 1138 #define RCU_PLLPRESRC_IRC48M RCU_CFG1_PLLPRESEL /*!< CK_PLL selected as…`

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