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Searched refs:RCU_CFG1_PLLMF5 (Results 1 – 3 of 3) sorted by relevance

/hal_gigadevice-latest/gd32f3x0/cmsis/gd/gd32f3x0/source/
Dsystem_gd32f3x0.c182 RCU_CFG1 &= ~(RCU_CFG1_PREDV | RCU_CFG1_PLLMF5 | RCU_CFG1_PLLPRESEL); in SystemInit()
308 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_hxtal()
309 RCU_CFG0 |= (RCU_PLLSRC_HXTAL_IRC48M | (RCU_PLL_MUL9 & (~RCU_CFG1_PLLMF5))); in system_clock_72m_hxtal()
311 RCU_CFG1 |= (RCU_PLL_MUL9 & RCU_CFG1_PLLMF5); in system_clock_72m_hxtal()
346 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_irc8m()
347 RCU_CFG0 |= (RCU_PLLSRC_IRC8M_DIV2 | (RCU_PLL_MUL18 & (~RCU_CFG1_PLLMF5))); in system_clock_72m_irc8m()
348 RCU_CFG1 |= (RCU_PLL_MUL18 & RCU_CFG1_PLLMF5); in system_clock_72m_irc8m()
388 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_irc48m()
389 RCU_CFG0 |= (RCU_PLLSRC_HXTAL_IRC48M | (RCU_PLL_MUL3 & (~RCU_CFG1_PLLMF5))); in system_clock_72m_irc48m()
391 RCU_CFG1 |= (RCU_PLL_MUL3 & RCU_CFG1_PLLMF5); in system_clock_72m_irc48m()
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/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_rcu.h213 #define RCU_CFG1_PLLMF5 BIT(31) /*!< bit 5 of PLLMF */ macro
572 #define RCU_PLL_MUL33 (CFG0_PLLMF(0) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
573 #define RCU_PLL_MUL34 (CFG0_PLLMF(1) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
574 #define RCU_PLL_MUL35 (CFG0_PLLMF(2) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
575 #define RCU_PLL_MUL36 (CFG0_PLLMF(3) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
576 #define RCU_PLL_MUL37 (CFG0_PLLMF(4) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
577 #define RCU_PLL_MUL38 (CFG0_PLLMF(5) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
578 #define RCU_PLL_MUL39 (CFG0_PLLMF(6) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
579 #define RCU_PLL_MUL40 (CFG0_PLLMF(7) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
580 #define RCU_PLL_MUL41 (CFG0_PLLMF(8) | RCU_CFG1_PLLMF5) /*!< PLL source clock multi…
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/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_rcu.c69 RCU_CFG1 &= ~(RCU_CFG1_PREDV | RCU_CFG1_PLLMF5 | RCU_CFG1_PLLPRESEL); in rcu_deinit()
485 RCU_CFG1 &= ~(RCU_CFG1_PLLMF5); in rcu_pll_config()
486 RCU_CFG0 |= (pll_src | (pll_mul & (~RCU_CFG1_PLLMF5))); in rcu_pll_config()
487 RCU_CFG1 |= (pll_mul & RCU_CFG1_PLLMF5); in rcu_pll_config()