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Searched refs:IOFFX_IOFF (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_adc.h193 #define IOFFX_IOFF(regval) (BITS(0,11) & ((uint32_t)(regval) << 0)) macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_adc.h201 #define IOFFX_IOFF(regval) (BITS(0, 11) & ((uint32_t)(regval) << 0)) /*!< write valu… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_adc.c417 REG32((ADC) + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); in adc_inserted_channel_offset_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_adc.h213 #define IOFFX_IOFF(regval) (BITS(0,11) & ((uint32_t)(regval) << 0)) /*!< write val… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_adc.h221 #define IOFFX_IOFF(regval) (BITS(0,11) & ((uint32_t)(regval) << 0)) /*!< write val… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_adc.h215 #define IOFFX_IOFF(regval) (BITS(0,11) & ((uint32_t)(regval) << 0)) /*!< write val… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_adc.h205 #define IOFFX_IOFF(regval) (BITS(0, 11) & ((uint32_t)(regval) << 0)) macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_adc.c472 REG32(ADC + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); in adc_inserted_channel_offset_config()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_adc.c459 REG32((adc_periph) + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); in adc_inserted_channel_offset_config()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_adc.h277 #define IOFFX_IOFF(regval) (BITS(0,11) & ((uint32_t)(regval) << 0)) /*!< write val… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_adc.c452 REG32((adc_periph) + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); in adc_inserted_channel_offset_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_adc.c562 REG32((adc_periph) + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); in adc_inserted_channel_offset_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_adc.c476 REG32((adc_periph) + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); in adc_inserted_channel_offset_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_adc.h275 #define IOFFX_IOFF(regval) (BITS(0, 11) & ((uint32_t)(regval) << 0)) macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_adc.c587 REG32((adc_periph) + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); in adc_inserted_channel_offset_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_adc.c457 REG32((adc_periph) + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); in adc_inserted_channel_offset_config()