| /hal_gigadevice-latest/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_exmc.c | 89 exmc_norsram_init_struct->burst_mode = DISABLE; in exmc_norsram_struct_para_init() 91 exmc_norsram_init_struct->wrap_burst_mode = DISABLE; in exmc_norsram_struct_para_init() 95 exmc_norsram_init_struct->extended_mode = DISABLE; in exmc_norsram_struct_para_init() 96 exmc_norsram_init_struct->asyn_wait = DISABLE; in exmc_norsram_struct_para_init()
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_exmc.c | 125 exmc_norsram_init_struct->burst_mode = DISABLE; in exmc_norsram_struct_para_init() 127 exmc_norsram_init_struct->wrap_burst_mode = DISABLE; in exmc_norsram_struct_para_init() 131 exmc_norsram_init_struct->extended_mode = DISABLE; in exmc_norsram_struct_para_init() 132 exmc_norsram_init_struct->asyn_wait = DISABLE; in exmc_norsram_struct_para_init() 320 exmc_nand_init_struct->wait_feature = DISABLE; in exmc_nand_struct_para_init() 322 exmc_nand_init_struct->ecc_logic = DISABLE; in exmc_nand_struct_para_init() 471 exmc_pccard_init_struct->wait_feature = DISABLE; in exmc_pccard_struct_para_init()
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| D | gd32e50x_can.c | 167 ((can_parameter_struct*)p_struct)->auto_bus_off_recovery = DISABLE; in can_struct_para_init() 168 ((can_parameter_struct*)p_struct)->auto_retrans = DISABLE; in can_struct_para_init() 169 ((can_parameter_struct*)p_struct)->auto_wake_up = DISABLE; in can_struct_para_init() 171 ((can_parameter_struct*)p_struct)->rec_fifo_overwrite = DISABLE; in can_struct_para_init() 175 ((can_parameter_struct*)p_struct)->time_triggered = DISABLE; in can_struct_para_init() 176 ((can_parameter_struct*)p_struct)->trans_fifo_order = DISABLE; in can_struct_para_init() 183 ((can_filter_parameter_struct*)p_struct)->filter_enable = DISABLE; in can_struct_para_init() 200 ((can_fdframe_struct*)p_struct)->delay_compensation = DISABLE; in can_struct_para_init() 203 ((can_fdframe_struct*)p_struct)->fd_frame = DISABLE; in can_struct_para_init()
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| D | gd32e50x_gpio.c | 401 if(DISABLE != newvalue){ in gpio_pin_remap_config() 529 if(DISABLE != newvalue){ in gpio_afio_port_config()
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/source/ |
| D | gd32f403_exmc.c | 125 exmc_norsram_init_struct->burst_mode = DISABLE; in exmc_norsram_struct_para_init() 127 exmc_norsram_init_struct->wrap_burst_mode = DISABLE; in exmc_norsram_struct_para_init() 131 exmc_norsram_init_struct->extended_mode = DISABLE; in exmc_norsram_struct_para_init() 132 exmc_norsram_init_struct->asyn_wait = DISABLE; in exmc_norsram_struct_para_init() 282 exmc_nand_init_struct->wait_feature = DISABLE; in exmc_nand_struct_para_init() 284 exmc_nand_init_struct->ecc_logic = DISABLE; in exmc_nand_struct_para_init() 392 exmc_pccard_init_struct->wait_feature = DISABLE; in exmc_pccard_struct_para_init()
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| D | gd32f403_can.c | 81 ((can_parameter_struct*)p_struct)->auto_bus_off_recovery = DISABLE; in can_struct_para_init() 82 ((can_parameter_struct*)p_struct)->no_auto_retrans = DISABLE; in can_struct_para_init() 83 ((can_parameter_struct*)p_struct)->auto_wake_up = DISABLE; in can_struct_para_init() 85 ((can_parameter_struct*)p_struct)->rec_fifo_overwrite = DISABLE; in can_struct_para_init() 89 ((can_parameter_struct*)p_struct)->time_triggered = DISABLE; in can_struct_para_init() 90 ((can_parameter_struct*)p_struct)->trans_fifo_order = DISABLE; in can_struct_para_init() 97 ((can_filter_parameter_struct*)p_struct)->filter_enable = DISABLE; in can_struct_para_init()
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_exmc.c | 153 exmc_norsram_init_struct->burst_mode = DISABLE; in exmc_norsram_struct_para_init() 155 exmc_norsram_init_struct->wrap_burst_mode = DISABLE; in exmc_norsram_struct_para_init() 159 exmc_norsram_init_struct->extended_mode = DISABLE; in exmc_norsram_struct_para_init() 160 exmc_norsram_init_struct->asyn_wait = DISABLE; in exmc_norsram_struct_para_init() 324 exmc_nand_init_struct->wait_feature = DISABLE; in exmc_nand_struct_para_init() 326 exmc_nand_init_struct->ecc_logic = DISABLE; in exmc_nand_struct_para_init() 442 exmc_pccard_init_struct->wait_feature = DISABLE; in exmc_pccard_struct_para_init() 568 exmc_sdram_init_struct->brust_read_switch = DISABLE; in exmc_sdram_struct_para_init()
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| D | gd32f4xx_can.c | 82 ((can_parameter_struct *)p_struct)->auto_bus_off_recovery = DISABLE; in can_struct_para_init() 84 ((can_parameter_struct *)p_struct)->auto_wake_up = DISABLE; in can_struct_para_init() 90 ((can_parameter_struct *)p_struct)->time_triggered = DISABLE; in can_struct_para_init() 91 ((can_parameter_struct *)p_struct)->trans_fifo_order = DISABLE; in can_struct_para_init() 98 ((can_filter_parameter_struct *)p_struct)->filter_enable = DISABLE; in can_struct_para_init() 203 if(DISABLE == can_parameter_init->auto_retrans) { in can_init() 209 if(DISABLE == can_parameter_init->rec_fifo_overwrite) { in can_init()
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_can.c | 81 ((can_parameter_struct*)p_struct)->auto_bus_off_recovery = DISABLE; in can_struct_para_init() 82 ((can_parameter_struct*)p_struct)->no_auto_retrans = DISABLE; in can_struct_para_init() 83 ((can_parameter_struct*)p_struct)->auto_wake_up = DISABLE; in can_struct_para_init() 85 ((can_parameter_struct*)p_struct)->rec_fifo_overwrite = DISABLE; in can_struct_para_init() 89 ((can_parameter_struct*)p_struct)->time_triggered = DISABLE; in can_struct_para_init() 90 ((can_parameter_struct*)p_struct)->trans_fifo_order = DISABLE; in can_struct_para_init() 97 ((can_filter_parameter_struct*)p_struct)->filter_enable = DISABLE; in can_struct_para_init()
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| D | gd32vf103_exmc.c | 85 exmc_norsram_init_struct->asyn_wait = DISABLE; in exmc_norsram_struct_para_init()
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| D | gd32vf103_gpio.c | 372 if (DISABLE != newvalue) { in gpio_pin_remap_config()
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_can.c | 158 if((uint8_t)DISABLE == can_parameter_init->self_reception) { in can_init() 170 if((uint32_t)DISABLE == can_parameter_init->edge_filter_enable) { in can_init() 230 ((can_parameter_struct *)p_struct)->self_reception = (uint8_t)DISABLE; in can_struct_para_init() 234 ((can_parameter_struct *)p_struct)->local_priority_enable = (uint8_t)DISABLE; in can_struct_para_init() 237 ((can_parameter_struct *)p_struct)->rx_private_filter_queue_enable = (uint8_t)DISABLE; in can_struct_para_init() 238 ((can_parameter_struct *)p_struct)->edge_filter_enable = (uint32_t)DISABLE; in can_struct_para_init() 239 ((can_parameter_struct *)p_struct)->protocol_exception_enable = (uint32_t)DISABLE; in can_struct_para_init() 251 ((can_fd_parameter_struct *)p_struct)->iso_can_fd_enable = (uint32_t)DISABLE; in can_struct_para_init() 254 ((can_fd_parameter_struct *)p_struct)->tdc_enable = (uint32_t)DISABLE; in can_struct_para_init() 264 ((can_fifo_parameter_struct *)p_struct)->dma_enable = (uint8_t)DISABLE; in can_struct_para_init() [all …]
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| /hal_gigadevice-latest/gd32vf103/riscv/include/ |
| D | gd32vf103.h | 179 typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus; enumerator
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| /hal_gigadevice-latest/gd32f3x0/cmsis/gd/gd32f3x0/include/ |
| D | gd32f3x0.h | 177 typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus; enumerator
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| /hal_gigadevice-latest/gd32f403/cmsis/gd/gd32f403/include/ |
| D | gd32f403.h | 182 typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus; enumerator
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| /hal_gigadevice-latest/gd32e10x/cmsis/gd/gd32e10x/include/ |
| D | gd32e10x.h | 190 typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus; enumerator
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| /hal_gigadevice-latest/gd32l23x/cmsis/gd/gd32l23x/include/ |
| D | gd32l23x.h | 179 typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus; enumerator
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| /hal_gigadevice-latest/gd32a50x/cmsis/gd/gd32a50x/include/ |
| D | gd32a50x.h | 184 typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus; enumerator
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| /hal_gigadevice-latest/gd32f4xx/cmsis/gd/gd32f4xx/include/ |
| D | gd32f4xx.h | 290 typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus; enumerator
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_cau_aes.c | 444 if(DISABLE == cau_enable_state_get()) { in cau_aes_gcm() 672 if(DISABLE == cau_enable_state_get()) { in cau_aes_ccm() 787 if(DISABLE == cau_enable_state_get()) { in cau_fill_data() 855 if(DISABLE == cau_enable_state_get()) { in cau_aes_calculate()
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| D | gd32l23x_cau_des.c | 153 if(DISABLE == cau_enable_state_get()) { in cau_des_calculate()
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| D | gd32l23x_cau_tdes.c | 168 if(DISABLE == cau_enable_state_get()) { in cau_tdes_calculate()
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| /hal_gigadevice-latest/gd32e50x/cmsis/gd/gd32e50x/include/ |
| D | gd32e50x.h | 464 typedef enum {DISABLE = 0, ENABLE = !DISABLE} EventStatus, ControlStatus; enumerator
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_rtc.c | 597 if(DISABLE == rtc_tamper->rtc_tamper_precharge_enable){ in rtc_tamper_enable() 609 if(DISABLE != rtc_tamper->rtc_tamper_with_timestamp){ in rtc_tamper_enable()
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| D | gd32f3x0_tsi.c | 302 if(DISABLE == extend){ in tsi_extend_charge_config()
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