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Searched refs:CTC_STAT (Results 1 – 12 of 12) sorted by relevance

/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_ctc.c208 capture_value = (uint16_t)((CTC_STAT & CTC_STAT_REFCAP) >> CTC_REFCAP_OFFSET); in ctc_counter_capture_value_read()
222 if(RESET != (CTC_STAT & CTC_STAT_REFDIR)) { in ctc_counter_direction_read()
313 interrupt_flag = CTC_STAT & int_flag; in ctc_interrupt_flag_get()
361 if(RESET != (CTC_STAT & flag)) { in ctc_flag_get()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_ctc.c211 capture_value = (uint16_t)((CTC_STAT & CTC_STAT_REFCAP)>> CTC_REFCAP_OFFSET); in ctc_counter_capture_value_read()
225 if(RESET != (CTC_STAT & CTC_STAT_REFDIR)){ in ctc_counter_direction_read()
274 if(RESET != (CTC_STAT & flag)){ in ctc_flag_get()
362 interrupt_flag = CTC_STAT & int_flag; in ctc_interrupt_flag_get()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_ctc.c210 capture_value = (uint16_t)((CTC_STAT & CTC_STAT_REFCAP)>> CTC_REFCAP_OFFSET); in ctc_counter_capture_value_read()
224 if(RESET != (CTC_STAT & CTC_STAT_REFDIR)){ in ctc_counter_direction_read()
315 interrupt_flag = CTC_STAT & int_flag; in ctc_interrupt_flag_get()
363 if(RESET != (CTC_STAT & flag)){ in ctc_flag_get()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_ctc.c204 capture_value = (uint16_t)GET_STAT_REFCAP(CTC_STAT); in ctc_counter_capture_value_read()
219 if(RESET != (CTC_STAT & CTC_STAT_REFDIR)){ in ctc_counter_direction_read()
301 if(RESET != (CTC_STAT & flag)){ in ctc_flag_get()
354 ctc_int = CTC_STAT & interrupt; in ctc_interrupt_flag_get()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_ctc.c210 capture_value = (uint16_t)((CTC_STAT & CTC_STAT_REFCAP)>> CTC_REFCAP_OFFSET); in ctc_counter_capture_value_read()
224 if(RESET != (CTC_STAT & CTC_STAT_REFDIR)){ in ctc_counter_direction_read()
315 intflag = CTC_STAT & interrupt; in ctc_interrupt_flag_get()
363 if(RESET != (CTC_STAT & flag)){ in ctc_flag_get()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_ctc.c225 capture_value = (uint16_t)((CTC_STAT & CTC_STAT_REFCAP) >> CTC_REFCAP_OFFSET); in ctc_counter_capture_value_read()
239 if(RESET != (CTC_STAT & CTC_STAT_REFDIR)) { in ctc_counter_direction_read()
330 interrupt_flag = CTC_STAT & int_flag; in ctc_interrupt_flag_get()
378 if(RESET != (CTC_STAT & flag)) { in ctc_flag_get()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_ctc.h46 #define CTC_STAT REG32((CTC) + 0x08U) /*!< CTC status register */ macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_ctc.h48 #define CTC_STAT REG32((CTC) + 0x08U) /*!< CTC status register */ macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_ctc.h48 #define CTC_STAT REG32((CTC) + 0x08U) /*!< CTC status register */ macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_ctc.h49 #define CTC_STAT REG32((CTC) + 0x08U) /*!< CTC status register */ macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_ctc.h49 #define CTC_STAT REG32((CTC) + 0x08U) /*!< CTC status register */ macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_ctc.h48 #define CTC_STAT REG32(CTC + 0x00000008U) /*!< CTC status register */ macro