Searched refs:CFG1_PLL1MF (Results 1 – 4 of 4) sorted by relevance
578 #define CFG1_PLL1MF(regval) (BITS(8,11) & ((uint32_t)(regval) << 8)) macro579 #define RCU_PLL1_MUL8 CFG1_PLL1MF(6) /*!< PLL1 source clock …580 #define RCU_PLL1_MUL9 CFG1_PLL1MF(7) /*!< PLL1 source clock …581 #define RCU_PLL1_MUL10 CFG1_PLL1MF(8) /*!< PLL1 source clock …582 #define RCU_PLL1_MUL11 CFG1_PLL1MF(9) /*!< PLL1 source clock …583 #define RCU_PLL1_MUL12 CFG1_PLL1MF(10) /*!< PLL1 source clock …584 #define RCU_PLL1_MUL13 CFG1_PLL1MF(11) /*!< PLL1 source clock …585 #define RCU_PLL1_MUL14 CFG1_PLL1MF(12) /*!< PLL1 source clock …586 #define RCU_PLL1_MUL15 CFG1_PLL1MF(13) /*!< PLL1 source clock …587 #define RCU_PLL1_MUL16 CFG1_PLL1MF(14) /*!< PLL1 source clock …[all …]
710 #define CFG1_PLL1MF(regval) (BITS(8,11) & ((uint32_t)(regval) << 8)) macro711 #define RCU_PLL1_MUL8 CFG1_PLL1MF(6) /*!< PLL1 source clock …712 #define RCU_PLL1_MUL9 CFG1_PLL1MF(7) /*!< PLL1 source clock …713 #define RCU_PLL1_MUL10 CFG1_PLL1MF(8) /*!< PLL1 source clock …714 #define RCU_PLL1_MUL11 CFG1_PLL1MF(9) /*!< PLL1 source clock …715 #define RCU_PLL1_MUL12 CFG1_PLL1MF(10) /*!< PLL1 source clock …716 #define RCU_PLL1_MUL13 CFG1_PLL1MF(11) /*!< PLL1 source clock …717 #define RCU_PLL1_MUL14 CFG1_PLL1MF(12) /*!< PLL1 source clock …718 #define RCU_PLL1_MUL15 CFG1_PLL1MF(13) /*!< PLL1 source clock …719 #define RCU_PLL1_MUL16 CFG1_PLL1MF(14) /*!< PLL1 source clock …[all …]
671 #define CFG1_PLL1MF(regval) (BITS(8,11) & ((uint32_t)(regval) << 8)) macro672 #define RCU_PLL1_MUL8 CFG1_PLL1MF(6) /*!< PLL1 source clock …673 #define RCU_PLL1_MUL9 CFG1_PLL1MF(7) /*!< PLL1 source clock …674 #define RCU_PLL1_MUL10 CFG1_PLL1MF(8) /*!< PLL1 source clock …675 #define RCU_PLL1_MUL11 CFG1_PLL1MF(9) /*!< PLL1 source clock …676 #define RCU_PLL1_MUL12 CFG1_PLL1MF(10) /*!< PLL1 source clock …677 #define RCU_PLL1_MUL13 CFG1_PLL1MF(11) /*!< PLL1 source clock …678 #define RCU_PLL1_MUL14 CFG1_PLL1MF(12) /*!< PLL1 source clock …679 #define RCU_PLL1_MUL16 CFG1_PLL1MF(14) /*!< PLL1 source clock …680 #define RCU_PLL1_MUL20 CFG1_PLL1MF(15) /*!< PLL1 source clock …
1043 #define CFG1_PLL1MF(regval) (BITS(8,11) & ((uint32_t)(regval) << 8)) macro1044 #define RCU_PLL1_MUL8 CFG1_PLL1MF(6) /*!< PLL1 source clock …1045 #define RCU_PLL1_MUL9 CFG1_PLL1MF(7) /*!< PLL1 source clock …1046 #define RCU_PLL1_MUL10 CFG1_PLL1MF(8) /*!< PLL1 source clock …1047 #define RCU_PLL1_MUL11 CFG1_PLL1MF(9) /*!< PLL1 source clock …1048 #define RCU_PLL1_MUL12 CFG1_PLL1MF(10) /*!< PLL1 source clock …1049 #define RCU_PLL1_MUL13 CFG1_PLL1MF(11) /*!< PLL1 source clock …1050 #define RCU_PLL1_MUL14 CFG1_PLL1MF(12) /*!< PLL1 source clock …1051 #define RCU_PLL1_MUL16 CFG1_PLL1MF(14) /*!< PLL1 source clock …1052 #define RCU_PLL1_MUL20 CFG1_PLL1MF(15) /*!< PLL1 source clock …
