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Searched refs:CFG0_SCSS (Results 1 – 8 of 8) sorted by relevance

/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_rcu.h432 #define CFG0_SCSS(regval) (BITS(2,3) & ((uint32_t)(regval) << 2)) macro
433 #define RCU_SCSS_IRC8M CFG0_SCSS(0) /*!< system clock sourc…
434 #define RCU_SCSS_HXTAL CFG0_SCSS(1) /*!< system clock sourc…
435 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sourc…
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_rcu.h464 #define CFG0_SCSS(regval) (BITS(2,3) & ((uint32_t)(regval) << 2)) macro
465 #define RCU_SCSS_IRC8M CFG0_SCSS(0) /*!< system clock sour…
466 #define RCU_SCSS_HXTAL CFG0_SCSS(1) /*!< system clock sour…
467 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sour…
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_rcu.h486 #define CFG0_SCSS(regval) (BITS(2,3) & ((uint32_t)(regval) << 2U)) macro
487 #define RCU_SCSS_IRC16M CFG0_SCSS(0) /*!< system clock source select …
488 #define RCU_SCSS_HXTAL CFG0_SCSS(1) /*!< system clock source select …
489 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock source select …
490 #define RCU_SCSS_IRC48M CFG0_SCSS(3) /*!< system clock source select …
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_rcu.h487 #define CFG0_SCSS(regval) (BITS(2,3) & ((uint32_t)(regval) << 2)) macro
488 #define RCU_SCSS_IRC8M CFG0_SCSS(0) /*!< system clock source select I…
489 #define RCU_SCSS_HXTAL CFG0_SCSS(1) /*!< system clock source select H…
490 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock source select P…
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_rcu.h509 #define CFG0_SCSS(regval) (BITS(2,3) & ((uint32_t)(regval) << 2)) macro
510 #define RCU_SCSS_IRC8M CFG0_SCSS(0) /*!< system clock sourc…
511 #define RCU_SCSS_HXTAL CFG0_SCSS(1) /*!< system clock sourc…
512 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sourc…
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_rcu.h516 #define CFG0_SCSS(regval) (BITS(2,3) & ((uint32_t)(regval) << 2)) macro
517 #define RCU_SCSS_IRC8M CFG0_SCSS(0) /*!< system clock sourc…
518 #define RCU_SCSS_HXTAL CFG0_SCSS(1) /*!< system clock sourc…
519 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sourc…
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_rcu.h822 #define CFG0_SCSS(regval) (BITS(2,3) & ((uint32_t)(regval) << 2)) macro
823 #define RCU_SCSS_IRC16M CFG0_SCSS(0) /*!< system clock source…
824 #define RCU_SCSS_HXTAL CFG0_SCSS(1) /*!< system clock source…
825 #define RCU_SCSS_PLLP CFG0_SCSS(2) /*!< system clock source…
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_rcu.h832 #define CFG0_SCSS(regval) (BITS(2,3) & ((uint32_t)(regval) << 2)) macro
833 #define RCU_SCSS_IRC8M CFG0_SCSS(0) /*!< system clock sourc…
834 #define RCU_SCSS_HXTAL CFG0_SCSS(1) /*!< system clock sourc…
835 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sourc…