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Searched refs:CFG0_SCS (Results 1 – 8 of 8) sorted by relevance

/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_rcu.h426 #define CFG0_SCS(regval) (BITS(0,1) & ((uint32_t)(regval) << 0)) macro
427 #define RCU_CKSYSSRC_IRC8M CFG0_SCS(0) /*!< system clock sourc…
428 #define RCU_CKSYSSRC_HXTAL CFG0_SCS(1) /*!< system clock sourc…
429 #define RCU_CKSYSSRC_PLL CFG0_SCS(2) /*!< system clock sourc…
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_rcu.h458 #define CFG0_SCS(regval) (BITS(0,1) & ((uint32_t)(regval) << 0)) macro
459 #define RCU_CKSYSSRC_IRC8M CFG0_SCS(0) /*!< system clock sour…
460 #define RCU_CKSYSSRC_HXTAL CFG0_SCS(1) /*!< system clock sour…
461 #define RCU_CKSYSSRC_PLL CFG0_SCS(2) /*!< system clock sour…
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_rcu.h479 #define CFG0_SCS(regval) (BITS(0,1) & ((uint32_t)(regval) << 0U)) macro
480 #define RCU_CKSYSSRC_IRC16M CFG0_SCS(0) /*!< system clock source select …
481 #define RCU_CKSYSSRC_HXTAL CFG0_SCS(1) /*!< system clock source select …
482 #define RCU_CKSYSSRC_PLL CFG0_SCS(2) /*!< system clock source select …
483 #define RCU_CKSYSSRC_IRC48M CFG0_SCS(3) /*!< system clock source select …
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_rcu.h481 #define CFG0_SCS(regval) (BITS(0,1) & ((uint32_t)(regval) << 0)) macro
482 #define RCU_CKSYSSRC_IRC8M CFG0_SCS(0) /*!< system clock source select I…
483 #define RCU_CKSYSSRC_HXTAL CFG0_SCS(1) /*!< system clock source select H…
484 #define RCU_CKSYSSRC_PLL CFG0_SCS(2) /*!< system clock source select P…
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_rcu.h503 #define CFG0_SCS(regval) (BITS(0,1) & ((uint32_t)(regval) << 0)) macro
504 #define RCU_CKSYSSRC_IRC8M CFG0_SCS(0) /*!< system clock sourc…
505 #define RCU_CKSYSSRC_HXTAL CFG0_SCS(1) /*!< system clock sourc…
506 #define RCU_CKSYSSRC_PLL CFG0_SCS(2) /*!< system clock sourc…
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_rcu.h510 #define CFG0_SCS(regval) (BITS(0,1) & ((uint32_t)(regval) << 0)) macro
511 #define RCU_CKSYSSRC_IRC8M CFG0_SCS(0) /*!< system clock sourc…
512 #define RCU_CKSYSSRC_HXTAL CFG0_SCS(1) /*!< system clock sourc…
513 #define RCU_CKSYSSRC_PLL CFG0_SCS(2) /*!< system clock sourc…
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_rcu.h816 #define CFG0_SCS(regval) (BITS(0,1) & ((uint32_t)(regval) << 0)) macro
817 #define RCU_CKSYSSRC_IRC16M CFG0_SCS(0) /*!< system clock source…
818 #define RCU_CKSYSSRC_HXTAL CFG0_SCS(1) /*!< system clock source…
819 #define RCU_CKSYSSRC_PLLP CFG0_SCS(2) /*!< system clock source…
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_rcu.h826 #define CFG0_SCS(regval) (BITS(0,1) & ((uint32_t)(regval) << 0)) macro
827 #define RCU_CKSYSSRC_IRC8M CFG0_SCS(0) /*!< system clock sourc…
828 #define RCU_CKSYSSRC_HXTAL CFG0_SCS(1) /*!< system clock sourc…
829 #define RCU_CKSYSSRC_PLL CFG0_SCS(2) /*!< system clock sourc…