| /hal_gigadevice-latest/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_adc.c | 815 if((uint32_t)RESET != (ADC_STAT & ADC_STAT_STRC)) { in adc_regular_software_startconv_flag_get()
830 if((uint32_t)RESET != (ADC_STAT & ADC_STAT_STIC)) { in adc_inserted_software_startconv_flag_get()
851 if(ADC_STAT & flag) { in adc_flag_get()
871 ADC_STAT &= ~((uint32_t)flag); in adc_flag_clear()
950 state = ADC_STAT & ADC_STAT_WDE; in adc_interrupt_flag_get()
957 state = ADC_STAT & ADC_STAT_EOC; in adc_interrupt_flag_get()
964 state = ADC_STAT & ADC_STAT_EOIC; in adc_interrupt_flag_get()
987 ADC_STAT &= ~((uint32_t)int_flag); in adc_interrupt_flag_clear()
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_adc.c | 584 if(ADC_STAT & flag){ in adc_flag_get()
604 ADC_STAT &= ~((uint32_t)flag); in adc_flag_clear()
625 state = ADC_STAT & ADC_STAT_WDE; in adc_interrupt_flag_get()
631 state = ADC_STAT & ADC_STAT_EOC; in adc_interrupt_flag_get()
637 state = ADC_STAT & ADC_STAT_EOIC; in adc_interrupt_flag_get()
660 ADC_STAT &= ~((uint32_t)flag); in adc_interrupt_flag_clear()
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_adc.c | 827 if(ADC_STAT(adc_periph) & adc_flag){ in adc_flag_get()
848 ADC_STAT(adc_periph) &= ~((uint32_t)adc_flag); in adc_flag_clear()
861 if((uint32_t)RESET != (ADC_STAT(adc_periph) & ADC_STAT_STRC)){ in adc_regular_software_startconv_flag_get()
877 if((uint32_t)RESET != (ADC_STAT(adc_periph) & ADC_STAT_STIC)){ in adc_inserted_software_startconv_flag_get()
902 state = ADC_STAT(adc_periph) & ADC_STAT_WDE; in adc_interrupt_flag_get()
909 state = ADC_STAT(adc_periph) & ADC_STAT_EOC; in adc_interrupt_flag_get()
916 state = ADC_STAT(adc_periph) & ADC_STAT_EOIC; in adc_interrupt_flag_get()
940 ADC_STAT(adc_periph) &= ~((uint32_t)adc_interrupt); in adc_interrupt_flag_clear()
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_adc.c | 921 if(ADC_STAT(adc_periph) & adc_flag) { in adc_flag_get()
944 ADC_STAT(adc_periph) &= ~((uint32_t)adc_flag); in adc_flag_clear()
957 if((uint32_t)RESET != (ADC_STAT(adc_periph) & ADC_STAT_STRC)) { in adc_regular_software_startconv_flag_get()
973 if((uint32_t)RESET != (ADC_STAT(adc_periph) & ADC_STAT_STIC)) { in adc_inserted_software_startconv_flag_get()
999 state = ADC_STAT(adc_periph) & ADC_STAT_WDE; in adc_interrupt_flag_get()
1006 state = ADC_STAT(adc_periph) & ADC_STAT_EOC; in adc_interrupt_flag_get()
1013 state = ADC_STAT(adc_periph) & ADC_STAT_EOIC; in adc_interrupt_flag_get()
1020 state = ADC_STAT(adc_periph) & ADC_STAT_ROVF; in adc_interrupt_flag_get()
1045 ADC_STAT(adc_periph) &= ~((uint32_t)adc_interrupt); in adc_interrupt_flag_clear()
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_adc.c | 930 if(ADC_STAT(adc_periph) & flag){ in adc_flag_get()
953 ADC_STAT(adc_periph) &= ~((uint32_t)flag); in adc_flag_clear()
1058 state = ADC_STAT(adc_periph) & ADC_STAT_WDE0; in adc_interrupt_flag_get()
1064 state = ADC_STAT(adc_periph) & ADC_STAT_EOC; in adc_interrupt_flag_get()
1070 state = ADC_STAT(adc_periph) & ADC_STAT_EOIC; in adc_interrupt_flag_get()
1076 state = ADC_STAT(adc_periph) & ADC_STAT_WDE1; in adc_interrupt_flag_get()
1082 state = ADC_STAT(adc_periph) & ADC_STAT_WDE2; in adc_interrupt_flag_get()
1108 ADC_STAT(adc_periph) &= ~((uint32_t)int_flag); in adc_interrupt_flag_clear()
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_adc.c | 827 if(ADC_STAT(adc_periph) & flag){ in adc_flag_get()
849 ADC_STAT(adc_periph) = ~((uint32_t)flag); in adc_flag_clear()
943 state = ADC_STAT(adc_periph) & ADC_STAT_WDE0; in adc_interrupt_flag_get()
949 state = ADC_STAT(adc_periph) & ADC_STAT_EOC; in adc_interrupt_flag_get()
955 state = ADC_STAT(adc_periph) & ADC_STAT_EOIC; in adc_interrupt_flag_get()
961 state = ADC_STAT(adc_periph) & ADC_STAT_WDE1; in adc_interrupt_flag_get()
986 ADC_STAT(adc_periph) = ~((uint32_t)int_flag); in adc_interrupt_flag_clear()
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/source/ |
| D | gd32f403_adc.c | 649 if(ADC_STAT(adc_periph) & adc_flag){ in adc_flag_get()
671 ADC_STAT(adc_periph) &= ~((uint32_t)adc_flag); in adc_flag_clear()
693 state = ADC_STAT(adc_periph) & ADC_STAT_WDE; in adc_interrupt_flag_get()
699 state = ADC_STAT(adc_periph) & ADC_STAT_EOC; in adc_interrupt_flag_get()
705 state = ADC_STAT(adc_periph) & ADC_STAT_EOIC; in adc_interrupt_flag_get()
730 ADC_STAT(adc_periph) &= ~((uint32_t)adc_interrupt); in adc_interrupt_flag_clear()
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_adc.c | 740 if(ADC_STAT(adc_periph) & adc_flag){ in adc_flag_get()
761 ADC_STAT(adc_periph) &= ~((uint32_t)adc_flag); in adc_flag_clear()
815 state = ADC_STAT(adc_periph) & ADC_STAT_WDE; in adc_interrupt_flag_get()
822 state = ADC_STAT(adc_periph) & ADC_STAT_EOC; in adc_interrupt_flag_get()
829 state = ADC_STAT(adc_periph) & ADC_STAT_EOIC; in adc_interrupt_flag_get()
853 ADC_STAT(adc_periph) &= ~((uint32_t)adc_interrupt); in adc_interrupt_flag_clear()
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/ |
| D | gd32f3x0_adc.h | 46 #define ADC_STAT REG32(ADC + 0x00000000U) /*!< ADC status regist… macro
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/include/ |
| D | gd32l23x_adc.h | 44 #define ADC_STAT REG32(ADC + 0x00000000U) /*!< ADC status… macro
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/include/ |
| D | gd32vf103_adc.h | 46 #define ADC_STAT(adcx) REG32((adcx) + 0x00U) /*!< ADC status register */ macro
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/include/ |
| D | gd32f403_adc.h | 48 #define ADC_STAT(adcx) REG32((adcx) + 0x00U) /*!< ADC status register */ macro
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/include/ |
| D | gd32e10x_adc.h | 48 #define ADC_STAT(adcx) REG32((adcx) + 0x00U) /*!< ADC status register */ macro
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/include/ |
| D | gd32a50x_adc.h | 45 #define ADC_STAT(adcx) REG32((adcx) + 0x00000000U) /*!< ADC status register */ macro
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_adc.h | 49 #define ADC_STAT(adcx) REG32((adcx) + 0x00U) /*!< ADC status register … macro
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_adc.h | 50 #define ADC_STAT(adcx) REG32((adcx) + 0x00000000U) /*!< ADC status register */ macro
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