| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_adc.c | 59 if(RESET == (ADC_CTL1 & ADC_CTL1_ADCON)){ in adc_enable()
60 ADC_CTL1 |= (uint32_t)ADC_CTL1_ADCON; in adc_enable()
72 ADC_CTL1 &= ~((uint32_t)ADC_CTL1_ADCON); in adc_disable()
84 ADC_CTL1 |= (uint32_t) ADC_CTL1_RSTCLB; in adc_calibration_enable()
86 while((ADC_CTL1 & ADC_CTL1_RSTCLB)){ in adc_calibration_enable()
90 ADC_CTL1 |= ADC_CTL1_CLB; in adc_calibration_enable()
92 while((ADC_CTL1 & ADC_CTL1_CLB)){ in adc_calibration_enable()
104 ADC_CTL1 |= (uint32_t)(ADC_CTL1_DMA); in adc_dma_mode_enable()
115 ADC_CTL1 &= ~((uint32_t)ADC_CTL1_DMA); in adc_dma_mode_disable()
127 ADC_CTL1 |= ADC_CTL1_TSVREN; in adc_tempsensor_vrefint_enable()
[all …]
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_adc.c | 81 if(RESET == (ADC_CTL1 & ADC_CTL1_ADCON)) { in adc_enable()
83 ADC_CTL1 |= (uint32_t)ADC_CTL1_ADCON; in adc_enable()
96 ADC_CTL1 &= ~((uint32_t)ADC_CTL1_ADCON); in adc_disable()
108 ADC_CTL1 |= (uint32_t) ADC_CTL1_RSTCLB; in adc_calibration_enable()
110 while((ADC_CTL1 & ADC_CTL1_RSTCLB)) { in adc_calibration_enable()
113 ADC_CTL1 |= ADC_CTL1_CLB; in adc_calibration_enable()
115 while((ADC_CTL1 & ADC_CTL1_CLB)) { in adc_calibration_enable()
128 ADC_CTL1 |= (uint32_t)(ADC_CTL1_DMA); in adc_dma_mode_enable()
140 ADC_CTL1 &= ~((uint32_t)ADC_CTL1_DMA); in adc_dma_mode_disable()
204 ADC_CTL1 |= (uint32_t)ADC_CONTINUOUS_MODE; in adc_special_function_config()
[all …]
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_adc.c | 67 if(0U == (ADC_CTL1(adc_periph) & ADC_CTL1_ADCON)){ in adc_enable()
68 ADC_CTL1(adc_periph) |= (uint32_t)ADC_CTL1_ADCON; in adc_enable()
80 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_ADCON); in adc_disable()
92 ADC_CTL1(adc_periph) |= (uint32_t) ADC_CTL1_RSTCLB; in adc_calibration_enable()
94 while((ADC_CTL1(adc_periph) & ADC_CTL1_RSTCLB)){ in adc_calibration_enable()
97 ADC_CTL1(adc_periph) |= ADC_CTL1_CLB; in adc_calibration_enable()
99 while((ADC_CTL1(adc_periph) & ADC_CTL1_CLB)){ in adc_calibration_enable()
111 ADC_CTL1(adc_periph) |= (uint32_t)(ADC_CTL1_DMA); in adc_dma_mode_enable()
122 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_DMA); in adc_dma_mode_disable()
134 ADC_CTL1(ADC0) |= ADC_CTL1_TSVEN; in adc_tempsensor_enable()
[all …]
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/source/ |
| D | gd32f403_adc.c | 75 if(RESET == (ADC_CTL1(adc_periph) & ADC_CTL1_ADCON)){ in adc_enable()
76 ADC_CTL1(adc_periph) |= (uint32_t)ADC_CTL1_ADCON; in adc_enable()
89 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_ADCON); in adc_disable()
102 ADC_CTL1(adc_periph) |= (uint32_t) ADC_CTL1_RSTCLB; in adc_calibration_enable()
104 while((ADC_CTL1(adc_periph) & ADC_CTL1_RSTCLB)){ in adc_calibration_enable()
107 ADC_CTL1(adc_periph) |= ADC_CTL1_CLB; in adc_calibration_enable()
109 while((ADC_CTL1(adc_periph) & ADC_CTL1_CLB)){ in adc_calibration_enable()
122 ADC_CTL1(adc_periph) |= (uint32_t)(ADC_CTL1_DMA); in adc_dma_mode_enable()
134 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_DMA); in adc_dma_mode_disable()
146 ADC_CTL1(ADC0) |= ADC_CTL1_TSVREN; in adc_tempsensor_vrefint_enable()
[all …]
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_adc.c | 132 ADC_CTL1(adc_periph) |= ADC_CONTINUOUS_MODE; in adc_special_function_config()
145 ADC_CTL1(adc_periph) &= ~ADC_CONTINUOUS_MODE; in adc_special_function_config()
164 ADC_CTL1(adc_periph) |= ADC_CTL1_DAL; in adc_data_alignment_config()
167 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_DAL); in adc_data_alignment_config()
179 if((uint32_t)RESET == (ADC_CTL1(adc_periph) & ADC_CTL1_ADCON)){ in adc_enable()
181 ADC_CTL1(adc_periph) |= (uint32_t)ADC_CTL1_ADCON; in adc_enable()
194 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_ADCON); in adc_disable()
206 ADC_CTL1(adc_periph) |= (uint32_t) ADC_CTL1_RSTCLB; in adc_calibration_enable()
208 while((uint32_t)RESET != (ADC_CTL1(adc_periph) & ADC_CTL1_RSTCLB)){ in adc_calibration_enable()
211 ADC_CTL1(adc_periph) |= ADC_CTL1_CLB; in adc_calibration_enable()
[all …]
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_adc.c | 134 ADC_CTL1(adc_periph) |= ADC_CONTINUOUS_MODE; in adc_special_function_config()
147 ADC_CTL1(adc_periph) &= ~ADC_CONTINUOUS_MODE; in adc_special_function_config()
166 ADC_CTL1(adc_periph) |= ADC_CTL1_DAL; in adc_data_alignment_config()
169 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_DAL); in adc_data_alignment_config()
181 if(RESET == (ADC_CTL1(adc_periph) & ADC_CTL1_ADCON)){ in adc_enable()
183 ADC_CTL1(adc_periph) |= (uint32_t)ADC_CTL1_ADCON; in adc_enable()
196 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_ADCON); in adc_disable()
208 ADC_CTL1(adc_periph) |= (uint32_t) ADC_CTL1_RSTCLB; in adc_calibration_enable()
210 while(RESET != (ADC_CTL1(adc_periph) & ADC_CTL1_RSTCLB)){ in adc_calibration_enable()
213 ADC_CTL1(adc_periph) |= ADC_CTL1_CLB; in adc_calibration_enable()
[all …]
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_adc.c | 122 ADC_CTL1(adc_periph) |= ADC_CONTINUOUS_MODE; in adc_special_function_config()
135 ADC_CTL1(adc_periph) &= ~ADC_CONTINUOUS_MODE; in adc_special_function_config()
154 ADC_CTL1(adc_periph) |= ADC_CTL1_DAL; in adc_data_alignment_config()
157 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_DAL); in adc_data_alignment_config()
169 if(RESET == (ADC_CTL1(adc_periph) & ADC_CTL1_ADCON)) { in adc_enable()
171 ADC_CTL1(adc_periph) |= (uint32_t)ADC_CTL1_ADCON; in adc_enable()
184 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_ADCON); in adc_disable()
196 ADC_CTL1(adc_periph) |= (uint32_t) ADC_CTL1_RSTCLB; in adc_calibration_enable()
198 while(RESET != (ADC_CTL1(adc_periph) & ADC_CTL1_RSTCLB)) { in adc_calibration_enable()
201 ADC_CTL1(adc_periph) |= ADC_CTL1_CLB; in adc_calibration_enable()
[all …]
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_adc.c | 75 if(RESET == (ADC_CTL1(adc_periph) & ADC_CTL1_ADCON)){ in adc_enable()
76 ADC_CTL1(adc_periph) |= (uint32_t)ADC_CTL1_ADCON; in adc_enable()
88 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_ADCON); in adc_disable()
100 ADC_CTL1(adc_periph) |= (uint32_t) ADC_CTL1_RSTCLB; in adc_calibration_enable()
102 while((ADC_CTL1(adc_periph) & ADC_CTL1_RSTCLB)){ in adc_calibration_enable()
105 ADC_CTL1(adc_periph) |= ADC_CTL1_CLB; in adc_calibration_enable()
107 while((ADC_CTL1(adc_periph) & ADC_CTL1_CLB)){ in adc_calibration_enable()
126 ADC_CTL1(adc_periph) &= ~((uint32_t)ADC_CTL1_CLBNUM); in adc_calibration_number()
127 ADC_CTL1(adc_periph) |= clb_num; in adc_calibration_number()
138 ADC_CTL1(adc_periph) |= (uint32_t)(ADC_CTL1_DMA); in adc_dma_mode_enable()
[all …]
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/ |
| D | gd32f3x0_adc.h | 48 #define ADC_CTL1 REG32(ADC + 0x00000008U) /*!< ADC control regis… macro
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/include/ |
| D | gd32l23x_adc.h | 46 #define ADC_CTL1 REG32(ADC + 0x00000008U) /*!< ADC contro… macro
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/include/ |
| D | gd32vf103_adc.h | 48 #define ADC_CTL1(adcx) REG32((adcx) + 0x08U) /*!< ADC control register … macro
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/include/ |
| D | gd32f403_adc.h | 50 #define ADC_CTL1(adcx) REG32((adcx) + 0x08U) /*!< ADC control register … macro
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/include/ |
| D | gd32e10x_adc.h | 50 #define ADC_CTL1(adcx) REG32((adcx) + 0x08U) /*!< ADC control register … macro
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/include/ |
| D | gd32a50x_adc.h | 47 #define ADC_CTL1(adcx) REG32((adcx) + 0x00000008U) /*!< ADC control register … macro
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_adc.h | 51 #define ADC_CTL1(adcx) REG32((adcx) + 0x08U) /*!< ADC control register… macro
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_adc.h | 52 #define ADC_CTL1(adcx) REG32((adcx) + 0x00000008U) /*!< ADC control register … macro
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