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Searched refs:ADC_BASE (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_adc.h44 #define ADC0 ADC_BASE
45 #define ADC1 (ADC_BASE + 0x100U)
46 #define ADC2 (ADC_BASE + 0x200U)
70 #define ADC_SSTAT REG32((ADC_BASE) + 0x300U) /*!< ADC summary status r…
71 #define ADC_SYNCCTL REG32((ADC_BASE) + 0x304U) /*!< ADC synchronization …
72 #define ADC_SYNCDATA REG32((ADC_BASE) + 0x308U) /*!< ADC synchronization …
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_adc.h43 #define ADC0 ADC_BASE
44 #define ADC1 (ADC_BASE + 0x400U)
45 #define ADC2 (ADC_BASE + 0x1800U)
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_adc.h43 #define ADC0 ADC_BASE
44 #define ADC1 (ADC_BASE + 0x00000400U)
46 #define ADC2 (ADC_BASE + 0x00001800U)
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_adc.h42 #define ADC0 ADC_BASE
43 #define ADC1 (ADC_BASE + 0x400U)
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_adc.h44 #define ADC0 ADC_BASE
45 #define ADC1 (ADC_BASE + 0x400U)
/hal_gigadevice-latest/gd32vf103/riscv/include/
Dgd32vf103.h223 #define ADC_BASE (APB2_BUS_BASE + 0x00002400U) /*!< ADC base address … macro
/hal_gigadevice-latest/gd32f3x0/cmsis/gd/gd32f3x0/include/
Dgd32f3x0.h218 #define ADC_BASE (APB2_BUS_BASE + 0x00002400U) /*!< ADC base address */ macro
/hal_gigadevice-latest/gd32f403/cmsis/gd/gd32f403/include/
Dgd32f403.h227 #define ADC_BASE (APB2_BUS_BASE + 0x00002400U) /*!< ADC base address … macro
/hal_gigadevice-latest/gd32e10x/cmsis/gd/gd32e10x/include/
Dgd32e10x.h236 #define ADC_BASE (APB2_BUS_BASE + 0x00002400U) /*!< ADC base address … macro
/hal_gigadevice-latest/gd32l23x/cmsis/gd/gd32l23x/include/
Dgd32l23x.h221 #define ADC_BASE (APB2_BUS_BASE + 0x00002400U) /*!< ADC base address */ macro
/hal_gigadevice-latest/gd32a50x/cmsis/gd/gd32a50x/include/
Dgd32a50x.h224 #define ADC_BASE (APB2_BUS_BASE + 0x00002400U) /*!< ADC base address */ macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_adc.h41 #define ADC0 ADC_BASE
42 #define ADC1 (ADC_BASE + 0x00000400U)
/hal_gigadevice-latest/gd32f4xx/cmsis/gd/gd32f4xx/include/
Dgd32f4xx.h339 #define ADC_BASE (APB2_BUS_BASE + 0x00002000U) /*!< ADC base address … macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_adc.h43 #define ADC ADC_BASE
/hal_gigadevice-latest/gd32e50x/cmsis/gd/gd32e50x/include/
Dgd32e50x.h510 #define ADC_BASE (APB2_BUS_BASE + 0x00002400U) /*!< ADC base address */ macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_adc.h41 #define ADC ADC_BASE