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Searched refs:reg_value (Results 1 – 2 of 2) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_enet.c339 uint32_t reg_value = 0U, reg_temp = 0U, temp = 0U; in enet_init() local
419 reg_value = ENET_MAC_CFG; in enet_init()
421 reg_value &= (~(ENET_MAC_CFG_SPD | ENET_MAC_CFG_DPM | ENET_MAC_CFG_LBM)); in enet_init()
422 reg_value |= media_temp; in enet_init()
423 ENET_MAC_CFG = reg_value; in enet_init()
430 reg_value = ENET_DMA_CTL; in enet_init()
432 reg_value &= ~ENET_DMA_CTL_DTCERFD; in enet_init()
433 reg_value |= ((uint32_t)checksum & ENET_DMA_CTL_DTCERFD); in enet_init()
434 ENET_DMA_CTL = reg_value; in enet_init()
445 reg_value = ENET_MAC_CFG; in enet_init()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_enet.c338 uint32_t reg_value=0U, reg_temp = 0U, temp = 0U; in enet_init() local
418 reg_value = ENET_MAC_CFG; in enet_init()
420 reg_value &= (~(ENET_MAC_CFG_SPD |ENET_MAC_CFG_DPM |ENET_MAC_CFG_LBM)); in enet_init()
421 reg_value |= media_temp; in enet_init()
422 ENET_MAC_CFG = reg_value; in enet_init()
428 reg_value = ENET_DMA_CTL; in enet_init()
430 reg_value &= ~ENET_DMA_CTL_DTCERFD; in enet_init()
431 reg_value |= ((uint32_t)checksum & ENET_DMA_CTL_DTCERFD); in enet_init()
432 ENET_DMA_CTL = reg_value; in enet_init()
443 reg_value = ENET_MAC_CFG; in enet_init()
[all …]