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Searched refs:USART_REG_VAL (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_usart.c651 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ in usart_flag_get()
672 USART_REG_VAL(usart_periph, flag) &= ~BIT(USART_BIT_POS(flag)); in usart_flag_clear()
693 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart_interrupt_enable()
714 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart_interrupt_disable()
740 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_usart.c782 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ in usart_flag_get()
805 USART_REG_VAL(usart_periph, flag) &= ~BIT(USART_BIT_POS(flag)); in usart_flag_clear()
828 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart_interrupt_enable()
851 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart_interrupt_disable()
879 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_usart.c805 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ in usart_flag_get()
829 USART_REG_VAL(usart_periph, flag) &= ~BIT(USART_BIT_POS(flag)); in usart_flag_clear()
852 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart_interrupt_enable()
875 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart_interrupt_disable()
903 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_usart.c1196 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ in usart_flag_get()
1220 USART_REG_VAL(usart_periph, flag) &= ~BIT(USART_BIT_POS(flag)); in usart_flag_clear()
1244 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart_interrupt_enable()
1268 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart_interrupt_disable()
1297 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart_interrupt_flag_get()
1658 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ in usart5_flag_get()
1713 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart5_interrupt_enable()
1739 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart5_interrupt_disable()
1787 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart5_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_usart.c883 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))) { in usart_flag_get()
907 USART_REG_VAL(usart_periph, flag) &= ~BIT(USART_BIT_POS(flag)); in usart_flag_clear()
930 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart_interrupt_enable()
953 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart_interrupt_disable()
981 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_usart.c1128 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ in usart_flag_get()
1193 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart_interrupt_enable()
1220 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart_interrupt_disable()
1251 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_usart.c1179 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))) { in usart_flag_get()
1236 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart_interrupt_enable()
1263 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart_interrupt_disable()
1294 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_usart.c1154 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ in usart_flag_get()
1211 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt)); in usart_interrupt_enable()
1238 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt)); in usart_interrupt_disable()
1269 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); in usart_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_usart.h125 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & (0x0000FFFFU)… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_usart.h147 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0xFFFFU) >> 6)… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_usart.h153 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0xFFFFU) >> 6)… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_usart.h160 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0xFFFFU) >> 6)… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_usart.h198 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0x0000FFFFU) >… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_usart.h200 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0x0000FFFFU) >… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_usart.h204 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0x0000FFFFU) >… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_usart.h303 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0xFFFFU) >> 6)… macro