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Searched refs:USART_CTL2_RTSEN (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_usart.c562 ctl &= ~USART_CTL2_RTSEN; in usart_hardware_flow_rts_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_usart.c1015 ctl &= ~USART_CTL2_RTSEN; in usart_hardware_flow_rts_config()
1016 ctl |= (USART_CTL2_RTSEN & rtsconfig); in usart_hardware_flow_rts_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_usart.h114 #define USART_CTL2_RTSEN BIT(8) /*!< RTS enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_usart.c690 ctl &= ~USART_CTL2_RTSEN; in usart_hardware_flow_rts_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_usart.c697 ctl &= ~USART_CTL2_RTSEN; in usart_hardware_flow_rts_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_usart.h117 #define USART_CTL2_RTSEN BIT(8) /*!< RTS enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_usart.c742 ctl &= ~USART_CTL2_RTSEN; in usart_hardware_flow_rts_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_usart.h119 #define USART_CTL2_RTSEN BIT(8) /*!< RTS enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_usart.h123 #define USART_CTL2_RTSEN BIT(8) /*!< RTS enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_usart.c841 USART_CTL2(usart_periph) &= ~(USART_CTL2_RTSEN); in usart_hardware_flow_rts_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_usart.c888 USART_CTL2(usart_periph) &= ~(USART_CTL2_RTSEN); in usart_hardware_flow_rts_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_usart.c862 USART_CTL2(usart_periph) &= ~(USART_CTL2_RTSEN); in usart_hardware_flow_rts_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_usart.h110 #define USART_CTL2_RTSEN BIT(8) /*!< enable RTS */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_usart.h112 #define USART_CTL2_RTSEN BIT(8) /*!< RTS enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_usart.h113 #define USART_CTL2_RTSEN BIT(8) /*!< RTS enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_usart.h138 #define USART_CTL2_RTSEN BIT(8) /*!< RTS enable */ macro