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Searched refs:USART_CTL1_RINV (Results 1 – 6 of 6) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_usart.c279 USART_CTL1(usart_periph) |= USART_CTL1_RINV; in usart_invert_config()
282 USART_CTL1(usart_periph) &= ~(USART_CTL1_RINV); in usart_invert_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_usart.c287 USART_CTL1(usart_periph) |= USART_CTL1_RINV; in usart_invert_config()
290 USART_CTL1(usart_periph) &= ~(USART_CTL1_RINV); in usart_invert_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_usart.c279 USART_CTL1(usart_periph) |= USART_CTL1_RINV; in usart_invert_config()
282 USART_CTL1(usart_periph) &= ~(USART_CTL1_RINV); in usart_invert_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_usart.h94 #define USART_CTL1_RINV BIT(16) /*!< RX pin level invers… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_usart.h94 #define USART_CTL1_RINV BIT(16) /*!< RX pin level inversion */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_usart.h95 #define USART_CTL1_RINV BIT(16) /*!< RX pin level invers… macro