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Searched refs:USART_CTL1_LMEN (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_usart.c323 USART_CTL1(usart_periph) |= USART_CTL1_LMEN; in usart_lin_mode_enable()
334 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN); in usart_lin_mode_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_usart.c425 USART_CTL1(usart_periph) |= USART_CTL1_LMEN; in usart_lin_mode_enable()
436 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN); in usart_lin_mode_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_usart.c432 USART_CTL1(usart_periph) |= USART_CTL1_LMEN; in usart_lin_mode_enable()
443 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN); in usart_lin_mode_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_usart.c477 USART_CTL1(usart_periph) |= USART_CTL1_LMEN; in usart_lin_mode_enable()
488 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN); in usart_lin_mode_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_usart.c522 USART_CTL1(usart_periph) |= USART_CTL1_LMEN; in usart_lin_mode_enable()
536 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN); in usart_lin_mode_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_usart.c569 USART_CTL1(usart_periph) |= USART_CTL1_LMEN; in usart_lin_mode_enable()
583 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN); in usart_lin_mode_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_usart.c543 USART_CTL1(usart_periph) |= USART_CTL1_LMEN; in usart_lin_mode_enable()
557 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN); in usart_lin_mode_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_usart.c542 USART_CTL1(usart_periph) |= USART_CTL1_LMEN; in usart_lin_mode_enable()
561 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN); in usart_lin_mode_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_usart.h103 #define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_usart.h106 #define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_usart.h108 #define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_usart.h112 #define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_usart.h92 #define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_usart.h92 #define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_usart.h93 #define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_usart.h127 #define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ macro