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Searched refs:USART_CTL1_CKEN (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_usart.c394 USART_CTL1(usart_periph) |= USART_CTL1_CKEN; in usart_synchronous_clock_enable()
405 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN); in usart_synchronous_clock_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_usart.c496 USART_CTL1(usart_periph) |= USART_CTL1_CKEN; in usart_synchronous_clock_enable()
507 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN); in usart_synchronous_clock_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_usart.c503 USART_CTL1(usart_periph) |= USART_CTL1_CKEN; in usart_synchronous_clock_enable()
514 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN); in usart_synchronous_clock_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_usart.c548 USART_CTL1(usart_periph) |= USART_CTL1_CKEN; in usart_synchronous_clock_enable()
559 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN); in usart_synchronous_clock_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_usart.c596 USART_CTL1(usart_periph) |= USART_CTL1_CKEN; in usart_clock_enable()
610 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN); in usart_clock_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_usart.c643 USART_CTL1(usart_periph) |= USART_CTL1_CKEN; in usart_clock_enable()
657 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN); in usart_clock_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_usart.c617 USART_CTL1(usart_periph) |= USART_CTL1_CKEN; in usart_clock_enable()
631 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN); in usart_clock_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_usart.c644 USART_CTL1(usart_periph) |= USART_CTL1_CKEN; in usart_synchronous_clock_enable()
663 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN); in usart_synchronous_clock_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_usart.h101 #define USART_CTL1_CKEN BIT(11) /*!< CK pin enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_usart.h104 #define USART_CTL1_CKEN BIT(11) /*!< CK pin enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_usart.h106 #define USART_CTL1_CKEN BIT(11) /*!< CK pin enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_usart.h110 #define USART_CTL1_CKEN BIT(11) /*!< CK pin enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_usart.h90 #define USART_CTL1_CKEN BIT(11) /*!< ck pin enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_usart.h90 #define USART_CTL1_CKEN BIT(11) /*!< ck pin enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_usart.h91 #define USART_CTL1_CKEN BIT(11) /*!< ck pin enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_usart.h125 #define USART_CTL1_CKEN BIT(11) /*!< CK pin enable */ macro