Home
last modified time | relevance | path

Searched refs:USART_CTL0_UEN (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_usart.c123 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_parity_config()
143 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_word_length_set()
165 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_stop_bit_set()
179 USART_CTL0(usart_periph) |= USART_CTL0_UEN; in usart_enable()
190 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_disable()
239 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_data_first_config()
263 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_invert_config()
303 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_overrun_enable()
316 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_overrun_disable()
334 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_oversample_config()
[all …]
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_usart.c131 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_parity_config()
151 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_word_length_set()
173 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_stop_bit_set()
187 USART_CTL0(usart_periph) |= USART_CTL0_UEN; in usart_enable()
198 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_disable()
247 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_data_first_config()
271 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_invert_config()
311 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_overrun_enable()
324 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_overrun_disable()
342 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_oversample_config()
[all …]
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_usart.c123 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_parity_config()
143 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_word_length_set()
165 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_stop_bit_set()
179 USART_CTL0(usart_periph) |= USART_CTL0_UEN; in usart_enable()
190 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_disable()
239 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_data_first_config()
263 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_invert_config()
303 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_overrun_enable()
316 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_overrun_disable()
334 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_oversample_config()
[all …]
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_usart.c185 USART_CTL0(usart_periph) |= USART_CTL0_UEN; in usart_enable()
196 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_usart.c189 USART_CTL0(usart_periph) |= USART_CTL0_UEN; in usart_enable()
200 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_usart.c191 USART_CTL0(usart_periph) |= USART_CTL0_UEN; in usart_enable()
202 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_usart.c209 USART_CTL0(usart_periph) |= USART_CTL0_UEN; in usart_enable()
220 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_usart.c245 USART_CTL0(usart_periph) |= USART_CTL0_UEN; in usart_enable()
262 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN); in usart_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_usart.h92 #define USART_CTL0_UEN BIT(13) /*!< USART enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_usart.h95 #define USART_CTL0_UEN BIT(13) /*!< USART enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_usart.h97 #define USART_CTL0_UEN BIT(13) /*!< USART enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_usart.h100 #define USART_CTL0_UEN BIT(13) /*!< USART enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_usart.h61 #define USART_CTL0_UEN BIT(0) /*!< enable USART */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_usart.h62 #define USART_CTL0_UEN BIT(0) /*!< USART enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_usart.h63 #define USART_CTL0_UEN BIT(0) /*!< USART enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_usart.h115 #define USART_CTL0_UEN BIT(13) /*!< USART enable */ macro