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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_tli.h44 #define TLI TLI_BASE /*!< TLI base address */ macro
50 #define TLI_SPSZ REG32(TLI + 0x00000008U) /*!< TLI synchronous pu…
51 #define TLI_BPSZ REG32(TLI + 0x0000000CU) /*!< TLI back-porch siz…
52 #define TLI_ASZ REG32(TLI + 0x00000010U) /*!< TLI active size re…
53 #define TLI_TSZ REG32(TLI + 0x00000014U) /*!< TLI total size reg…
54 #define TLI_CTL REG32(TLI + 0x00000018U) /*!< TLI control regist…
55 #define TLI_RL REG32(TLI + 0x00000024U) /*!< TLI reload Layer r…
56 #define TLI_BGC REG32(TLI + 0x0000002CU) /*!< TLI background col…
57 #define TLI_INTEN REG32(TLI + 0x00000034U) /*!< TLI interrupt enab…
58 #define TLI_INTF REG32(TLI + 0x00000038U) /*!< TLI interrupt flag…
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