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Searched refs:SLCD_CFG_DIV (Results 1 – 2 of 2) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_slcd.c95 reg &= ~(SLCD_CFG_PSC | SLCD_CFG_DIV); in slcd_init()
195 reg &= ~(SLCD_CFG_PSC | SLCD_CFG_DIV); in slcd_clock_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_slcd.h75 #define SLCD_CFG_DIV BITS(18,21) /*!< clock divider */ macro