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Searched refs:RTC_DIVH (Results 1 – 10 of 10) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_rtc.c188 temp = (RTC_DIVH & RTC_DIVH_DIV) << 16; in rtc_divider_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_rtc.c165 temp = (RTC_DIVH & RTC_DIVH_DIV) << 16; in rtc_divider_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_rtc.c158 temp = (RTC_DIVH & RTC_DIVH_DIV) << 16; in rtc_divider_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_rtc.h50 #define RTC_DIVH REG32(RTC + 0x00000010U) /*!< divider high register */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_rtc.h50 #define RTC_DIVH REG32(RTC + 0x10U) /*!< divider high register */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_rtc.c168 temp = ((RTC_DIVH & RTC_DIVH_DIV) << RTC_HIGH_BITS_OFFSET); in rtc_divider_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_rtc.c178 temp = ((RTC_DIVH & RTC_DIVH_DIV) << RTC_HIGH_BITS_OFFSET); in rtc_divider_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_rtc.h49 #define RTC_DIVH REG32(RTC + 0x10U) /*!< divider high register */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_rtc.h51 #define RTC_DIVH REG32(RTC + 0x10U) /*!< divider high register */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_rtc.h48 #define RTC_DIVH REG32(RTC + 0x10U) /*!< divider high register */ macro