Searched refs:RCU_SPI2RST (Results 1 – 10 of 10) sorted by relevance
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_spi.c | 74 rcu_periph_reset_enable(RCU_SPI2RST); in spi_i2s_deinit()
75 rcu_periph_reset_disable(RCU_SPI2RST); in spi_i2s_deinit()
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_spi.c | 74 rcu_periph_reset_enable(RCU_SPI2RST); in spi_i2s_deinit()
75 rcu_periph_reset_disable(RCU_SPI2RST); in spi_i2s_deinit()
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_spi.c | 80 rcu_periph_reset_enable(RCU_SPI2RST); in spi_i2s_deinit()
81 rcu_periph_reset_disable(RCU_SPI2RST); in spi_i2s_deinit()
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/ |
| D | gd32f403_spi.c | 75 rcu_periph_reset_enable(RCU_SPI2RST); in spi_i2s_deinit()
76 rcu_periph_reset_disable(RCU_SPI2RST); in spi_i2s_deinit()
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_spi.c | 71 rcu_periph_reset_enable(RCU_SPI2RST); in spi_i2s_deinit()
72 rcu_periph_reset_disable(RCU_SPI2RST); in spi_i2s_deinit()
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/ |
| D | gd32vf103_rcu.h | 325 RCU_SPI2RST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 15U), /*!< SPI2 clock reset */ enumerator
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/ |
| D | gd32e10x_rcu.h | 385 RCU_SPI2RST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 15U), /*!< SPI2 clock reset */ enumerator
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/ |
| D | gd32f403_rcu.h | 389 RCU_SPI2RST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 15U), /*!< SPI2 clock reset */ enumerator
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_rcu.h | 694 RCU_SPI2RST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 15U), /*!< SPI2 clock reset */ enumerator
|
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_rcu.h | 656 RCU_SPI2RST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 15U), /*!< SPI2 clock reset */ enumerator
|
