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Searched refs:RCU_CTL_PLL2STB (Results 1 – 5 of 5) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/riscv/source/
Dsystem_gd32vf103.c797 while(0U == (RCU_CTL & RCU_CTL_PLL2STB)){ in system_clock_108m_hxtal()
812 while(0U == (RCU_CTL & RCU_CTL_PLL2STB)){ in system_clock_108m_hxtal()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_rcu.h76 #define RCU_CTL_PLL2STB BIT(29) /*!< PLL2 clock stabilization fla… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_rcu.h80 #define RCU_CTL_PLL2STB BIT(29) /*!< PLL2 clock stabilization fla… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_rcu.h79 #define RCU_CTL_PLL2STB BIT(29) /*!< PLL2 clock stabilization fla… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_rcu.h137 #define RCU_CTL_PLL2STB BIT(29) /*!< PLL2 clock stabilization fla… macro