RCU_CTL0_PLLSTB (reference) in projects: hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0

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Searched refs:RCU_CTL0_PLLSTB (Results 1 – 2 of 2) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/cmsis/gd/gd32f3x0/source/
D	system_gd32f3x0.c	316 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_72m_hxtal() 353 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_72m_irc8m() 396 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_72m_irc48m() 450 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_84m_hxtal() 486 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_84m_irc8m() 541 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_96m_hxtal() 578 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_96m_irc8m() 622 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_96m_irc48m() 678 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_108m_hxtal() 715 while(0U == (RCU_CTL0 & RCU_CTL0_PLLSTB)){ in system_clock_108m_irc8m()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
D	gd32f3x0_rcu.h	`78 #define RCU_CTL0_PLLSTB BIT(25) /!< PLL clock stabilization flag / macro`

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