PHY_REG_BCR (reference) in projects: hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0

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Searched refs:PHY_REG_BCR (Results 1 – 4 of 4) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
D	gd32f4xx_enet.c	374 phy_state = enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &phy_value); in enet_init() 410 phy_state = enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &phy_value); in enet_init() 1565 if(ERROR == (enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &phy_value))) { in enet_phy_config() 1572 if(ERROR == (enet_phy_write_read(ENET_PHY_READ, PHY_ADDRESS, PHY_REG_BCR, &phy_value))) { in enet_phy_config() 1643 enet_phy_write_read(ENET_PHY_READ, PHY_ADDRESS, PHY_REG_BCR, &temp_phy); in enet_phyloopback_enable() 1649 phy_state = enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &temp_phy); in enet_phyloopback_enable() 1666 enet_phy_write_read(ENET_PHY_READ, PHY_ADDRESS, PHY_REG_BCR, &temp_phy); in enet_phyloopback_disable() 1672 phy_state = enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &temp_phy); in enet_phyloopback_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
D	gd32e50x_enet.c	373 phy_state = enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &phy_value); in enet_init() 409 phy_state = enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &phy_value); in enet_init() 1573 if(ERROR == (enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &phy_value))){ in enet_phy_config() 1580 if(ERROR == (enet_phy_write_read(ENET_PHY_READ, PHY_ADDRESS, PHY_REG_BCR, &phy_value))){ in enet_phy_config() 1652 enet_phy_write_read(ENET_PHY_READ, PHY_ADDRESS, PHY_REG_BCR, &temp_phy); in enet_phyloopback_enable() 1658 phy_state = enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &temp_phy); in enet_phyloopback_enable() 1675 enet_phy_write_read(ENET_PHY_READ, PHY_ADDRESS, PHY_REG_BCR, &temp_phy); in enet_phyloopback_disable() 1681 phy_state = enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, PHY_REG_BCR, &temp_phy); in enet_phyloopback_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
D	gd32e50x_enet.h	`83 #define PHY_REG_BCR 0U /*!< tranceiver bas… macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
D	gd32f4xx_enet.h	`85 #define PHY_REG_BCR 0U /*!< tranceiver bas… macro`

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