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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_ipa.h44 #define IPA IPA_BASE /*!< IPA base address */ macro
48 #define IPA_CTL REG32(IPA + 0x00000000U) /*!< IPA control register */
49 #define IPA_INTF REG32(IPA + 0x00000004U) /*!< IPA interrupt flag regi…
50 #define IPA_INTC REG32(IPA + 0x00000008U) /*!< IPA interrupt flag clea…
51 #define IPA_FMADDR REG32(IPA + 0x0000000CU) /*!< IPA foreground memory b…
52 #define IPA_FLOFF REG32(IPA + 0x00000010U) /*!< IPA foreground line off…
53 #define IPA_BMADDR REG32(IPA + 0x00000014U) /*!< IPA background memory b…
54 #define IPA_BLOFF REG32(IPA + 0x00000018U) /*!< IPA background line off…
55 #define IPA_FPCTL REG32(IPA + 0x0000001CU) /*!< IPA foreground pixel co…
56 #define IPA_FPV REG32(IPA + 0x00000020U) /*!< IPA foreground pixel va…
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