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Searched refs:GD32_REMAP (Results 1 – 5 of 5) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/include/dt-bindings/pinctrl/
Dgd32e507xx-afio.h12 #define GD32_SPI0_NORMP GD32_REMAP(0U, 0U, 0x1U, 0U)
14 #define GD32_SPI0_RMP GD32_REMAP(0U, 0U, 0x1U, 1U)
17 #define GD32_I2C0_NORMP GD32_REMAP(0U, 1U, 0x1U, 0U)
19 #define GD32_I2C0_RMP GD32_REMAP(0U, 1U, 0x1U, 1U)
22 #define GD32_USART0_NORMP GD32_REMAP(0U, 2U, 0x1U, 0U)
24 #define GD32_USART0_RMP GD32_REMAP(0U, 2U, 0x1U, 1U)
27 #define GD32_USART1_NORMP GD32_REMAP(0U, 3U, 0x1U, 0U)
29 #define GD32_USART1_RMP GD32_REMAP(0U, 3U, 0x1U, 1U)
32 #define GD32_USART2_NORMP GD32_REMAP(0U, 4U, 0x3U, 0U)
34 #define GD32_USART2_PRMP GD32_REMAP(0U, 4U, 0x3U, 1U)
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Dgd32f403xx-afio.h12 #define GD32_SPI0_NORMP GD32_REMAP(0U, 0U, 0x1U, 0U)
14 #define GD32_SPI0_RMP GD32_REMAP(0U, 0U, 0x1U, 1U)
17 #define GD32_I2C0_NORMP GD32_REMAP(0U, 1U, 0x1U, 0U)
19 #define GD32_I2C0_RMP GD32_REMAP(0U, 1U, 0x1U, 1U)
22 #define GD32_USART0_NORMP GD32_REMAP(0U, 2U, 0x1U, 0U)
24 #define GD32_USART0_RMP GD32_REMAP(0U, 2U, 0x1U, 1U)
27 #define GD32_USART1_NORMP GD32_REMAP(0U, 3U, 0x1U, 0U)
29 #define GD32_USART1_RMP GD32_REMAP(0U, 3U, 0x1U, 1U)
32 #define GD32_USART2_NORMP GD32_REMAP(0U, 4U, 0x3U, 0U)
34 #define GD32_USART2_PRMP GD32_REMAP(0U, 4U, 0x3U, 1U)
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Dgd32e103xx-afio.h12 #define GD32_SPI0_NORMP GD32_REMAP(0U, 0U, 0x1U, 0U)
14 #define GD32_SPI0_RMP GD32_REMAP(0U, 0U, 0x1U, 1U)
17 #define GD32_I2C0_NORMP GD32_REMAP(0U, 1U, 0x1U, 0U)
19 #define GD32_I2C0_RMP GD32_REMAP(0U, 1U, 0x1U, 1U)
22 #define GD32_USART0_NORMP GD32_REMAP(0U, 2U, 0x1U, 0U)
24 #define GD32_USART0_RMP GD32_REMAP(0U, 2U, 0x1U, 1U)
27 #define GD32_USART1_NORMP GD32_REMAP(0U, 3U, 0x1U, 0U)
29 #define GD32_USART1_RMP GD32_REMAP(0U, 3U, 0x1U, 1U)
32 #define GD32_USART2_NORMP GD32_REMAP(0U, 4U, 0x3U, 0U)
34 #define GD32_USART2_PRMP GD32_REMAP(0U, 4U, 0x3U, 1U)
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Dgd32vf103xx-afio.h12 #define GD32_SPI0_NORMP GD32_REMAP(0U, 0U, 0x1U, 0U)
14 #define GD32_SPI0_RMP GD32_REMAP(0U, 0U, 0x1U, 1U)
17 #define GD32_I2C0_NORMP GD32_REMAP(0U, 1U, 0x1U, 0U)
19 #define GD32_I2C0_RMP GD32_REMAP(0U, 1U, 0x1U, 1U)
22 #define GD32_USART0_NORMP GD32_REMAP(0U, 2U, 0x1U, 0U)
24 #define GD32_USART0_RMP GD32_REMAP(0U, 2U, 0x1U, 1U)
27 #define GD32_USART1_NORMP GD32_REMAP(0U, 3U, 0x1U, 0U)
29 #define GD32_USART1_RMP GD32_REMAP(0U, 3U, 0x1U, 1U)
32 #define GD32_USART2_NORMP GD32_REMAP(0U, 4U, 0x3U, 0U)
34 #define GD32_USART2_PRMP GD32_REMAP(0U, 4U, 0x3U, 1U)
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Dgd32-afio.h172 #define GD32_REMAP(reg, pos, msk, val) \ macro