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Searched refs:ENET_RDES1_DINTC (Results 1 – 4 of 4) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_enet.h587 #define ENET_RDES1_DINTC BIT(31) /*!< disable interr… macro
1401 #define ENET_RECEIVE_COMPLETE_INT_DISABLE ENET_RDES1_DINTC /*!…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_enet.h591 #define ENET_RDES1_DINTC BIT(31) /*!< disable interr… macro
1422 #define ENET_RECEIVE_COMPLETE_INT_DISABLE ENET_RDES1_DINTC /*!…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_enet.c2187 desc->control_buffer_size &= ~ENET_RDES1_DINTC; in enet_rx_desc_immediate_receive_complete_interrupt()
2199 desc->control_buffer_size |= ENET_RDES1_DINTC; in enet_rx_desc_delay_receive_complete_interrupt()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_enet.c2196 desc->control_buffer_size &= ~ENET_RDES1_DINTC; in enet_rx_desc_immediate_receive_complete_interrupt()
2208 desc->control_buffer_size |= ENET_RDES1_DINTC; in enet_rx_desc_delay_receive_complete_interrupt()