ENET_DMA_CTL_SRE (reference) in projects: hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0

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Searched refs:ENET_DMA_CTL_SRE (Results 1 – 4 of 4) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
D	gd32f4xx_enet.c	`1368 ENET_DMA_CTL \|= ENET_DMA_CTL_SRE; in enet_rx_enable() 1379 ENET_DMA_CTL &= ~ENET_DMA_CTL_SRE; in enet_rx_disable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
D	gd32e50x_enet.c	`1376 ENET_DMA_CTL \|= ENET_DMA_CTL_SRE; in enet_rx_enable() 1387 ENET_DMA_CTL &= ~ENET_DMA_CTL_SRE; in enet_rx_disable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
D	gd32e50x_enet.h	`465 #define ENET_DMA_CTL_SRE BIT(1) /*!< start/stop rec… macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
D	gd32f4xx_enet.h	`469 #define ENET_DMA_CTL_SRE BIT(1) /*!< start/stop rec… macro`

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