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Searched refs:DMA_CHXCTL_MWIDTH (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_dma.c114 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
319 ctl &= ~DMA_CHXCTL_MWIDTH; in dma_memory_width_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_dma.c150 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO | DMA_CHXCTL_TM); in dma_single_data_mode_init()
219 …ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO | DMA_CHXCTL_TM | DMA_CHXCTL_PBUR… in dma_multi_data_mode_init()
409 ctl &= ~DMA_CHXCTL_MWIDTH; in dma_memory_width_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_dma.c138 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
415 ctl &= ~DMA_CHXCTL_MWIDTH; in dma_memory_width_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_dma.c134 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
411 ctl &= ~DMA_CHXCTL_MWIDTH; in dma_memory_width_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_dma.c135 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
413 ctl &= ~DMA_CHXCTL_MWIDTH; in dma_memory_width_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_dma.c129 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
406 ctl &= ~DMA_CHXCTL_MWIDTH; in dma_memory_width_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_dma.c135 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
344 ctl &= ~DMA_CHXCTL_MWIDTH; in dma_memory_width_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_dma.c147 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
372 ctl &= ~DMA_CHXCTL_MWIDTH; in dma_memory_width_config()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_dma.h100 #define DMA_CHXCTL_MWIDTH BITS(10,11) /*!< transfer data size of memory */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_dma.h108 #define DMA_CHXCTL_MWIDTH BITS(10,11) /*!< transfer data width of memory … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_dma.h108 #define DMA_CHXCTL_MWIDTH BITS(10,11) /*!< transfer data width of memory … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_dma.h102 #define DMA_CHXCTL_MWIDTH BITS(10,11) /*!< transfer data width of memory … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_dma.h108 #define DMA_CHXCTL_MWIDTH BITS(10,11) /*!< transfer data width of memory … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_dma.h135 #define DMA_CHXCTL_MWIDTH BITS(13,14) /*!< transfer width of memo… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_dma.h115 #define DMA_CHXCTL_MWIDTH BITS(10,11) … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_dma.h125 #define DMA_CHXCTL_MWIDTH BITS(10,11) /*!< transfer data s… macro