Searched refs:DMA_CHXCTL_M2M (Results 1 – 14 of 14) sorted by relevance
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/ |
D | gd32f3x0_dma.c | 176 DMA_CHCTL(channelx) |= DMA_CHXCTL_M2M; in dma_memory_to_memory_enable() 189 DMA_CHCTL(channelx) &= ~DMA_CHXCTL_M2M; in dma_memory_to_memory_disable()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/ |
D | gd32e50x_dma.c | 218 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_M2M; in dma_memory_to_memory_enable() 237 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_M2M; in dma_memory_to_memory_disable()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/ |
D | gd32f403_dma.c | 214 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_M2M; in dma_memory_to_memory_enable() 233 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_M2M; in dma_memory_to_memory_disable()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/ |
D | gd32e10x_dma.c | 215 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_M2M; in dma_memory_to_memory_enable() 234 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_M2M; in dma_memory_to_memory_disable()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/ |
D | gd32vf103_dma.c | 209 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_M2M; in dma_memory_to_memory_enable() 228 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_M2M; in dma_memory_to_memory_disable()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/ |
D | gd32l23x_dma.c | 200 DMA_CHCTL(channelx) |= DMA_CHXCTL_M2M; in dma_memory_to_memory_enable() 213 DMA_CHCTL(channelx) &= ~DMA_CHXCTL_M2M; in dma_memory_to_memory_disable()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/ |
D | gd32a50x_dma.c | 220 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_M2M; in dma_memory_to_memory_enable() 234 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_M2M; in dma_memory_to_memory_disable()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/ |
D | gd32f3x0_dma.h | 102 #define DMA_CHXCTL_M2M BIT(14) /*!< memory to memory mode */ macro
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/ |
D | gd32f403_dma.h | 110 #define DMA_CHXCTL_M2M BIT(14) /*!< memory to memory mode */ macro
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/ |
D | gd32vf103_dma.h | 110 #define DMA_CHXCTL_M2M BIT(14) /*!< memory to memory mode */ macro
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/ |
D | gd32e10x_dma.h | 104 #define DMA_CHXCTL_M2M BIT(14) /*!< memory to memory mode */ macro
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/ |
D | gd32e50x_dma.h | 110 #define DMA_CHXCTL_M2M BIT(14) /*!< memory to memory mode */ macro
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/ |
D | gd32l23x_dma.h | 117 #define DMA_CHXCTL_M2M BIT(14) … macro
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/ |
D | gd32a50x_dma.h | 127 #define DMA_CHXCTL_M2M BIT(14) /*!< memory to memor… macro
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