DMA_CHXCTL_HTFIE (reference) in projects: hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0

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Searched refs:DMA_CHXCTL_HTFIE (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
D	gd32f3x0_dma.h	`93 #define DMA_CHXCTL_HTFIE BIT(2) /!< enable bit for channel x trans… macro 178 #define DMA_INT_HTF DMA_CHXCTL_HTFIE /!< enab…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
D	gd32f403_dma.h	`101 #define DMA_CHXCTL_HTFIE BIT(2) /!< enable bit for channel half tr… macro 180 #define DMA_INT_HTF DMA_CHXCTL_HTFIE /!< en…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
D	gd32vf103_dma.h	`101 #define DMA_CHXCTL_HTFIE BIT(2) /!< enable bit for channel half tr… macro 181 #define DMA_INT_HTF DMA_CHXCTL_HTFIE /!< en…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
D	gd32e10x_dma.h	`95 #define DMA_CHXCTL_HTFIE BIT(2) /!< enable bit for channel half tr… macro 174 #define DMA_INT_HTF DMA_CHXCTL_HTFIE /!< en…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
D	gd32e50x_dma.h	`101 #define DMA_CHXCTL_HTFIE BIT(2) /!< enable bit for channel half tr… macro 181 #define DMA_INT_HTF DMA_CHXCTL_HTFIE /!< en…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
D	gd32f4xx_dma.c	`836 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get() 862 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
D	gd32f3x0_dma.c	`492 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
D	gd32l23x_dma.h	`108 #define DMA_CHXCTL_HTFIE BIT(2) … macro 354 #define DMA_INT_HTF DMA_CHXCTL_HTFIE …`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
D	gd32a50x_dma.h	`118 #define DMA_CHXCTL_HTFIE BIT(2) /!< enable bit for … macro 405 #define DMA_INT_HTF DMA_CHXCTL_HTFIE /!< ena…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
D	gd32e50x_dma.c	`690 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
D	gd32f403_dma.c	`627 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
D	gd32e10x_dma.c	`630 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
D	gd32vf103_dma.c	`623 interrupt_enable = DMA_CHCTL(dma_periph, (uint32_t)channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
D	gd32l23x_dma.c	`517 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
D	gd32f4xx_dma.h	`127 #define DMA_CHXCTL_HTFIE BIT(3) /*!< enable bit for channel… macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
D	gd32a50x_dma.c	`592 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()`

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TraceRecorderSource-3.4.0
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