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Searched refs:DMA_CHXCTL_ERRIE (Results 1 – 14 of 14) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_dma.h94 #define DMA_CHXCTL_ERRIE BIT(3) /*!< enable bit for channel x error… macro
179 #define DMA_INT_ERR DMA_CHXCTL_ERRIE /*!< enab…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_dma.h102 #define DMA_CHXCTL_ERRIE BIT(3) /*!< enable bit for channel error i… macro
181 #define DMA_INT_ERR DMA_CHXCTL_ERRIE /*!< en…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_dma.h102 #define DMA_CHXCTL_ERRIE BIT(3) /*!< enable bit for channel error i… macro
182 #define DMA_INT_ERR DMA_CHXCTL_ERRIE /*!< en…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_dma.h96 #define DMA_CHXCTL_ERRIE BIT(3) /*!< enable bit for channel error i… macro
175 #define DMA_INT_ERR DMA_CHXCTL_ERRIE /*!< en…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_dma.h102 #define DMA_CHXCTL_ERRIE BIT(3) /*!< enable bit for channel error i… macro
182 #define DMA_INT_ERR DMA_CHXCTL_ERRIE /*!< en…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_dma.c496 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_dma.h109 #define DMA_CHXCTL_ERRIE BIT(3) … macro
355 #define DMA_INT_ERR DMA_CHXCTL_ERRIE
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_dma.h119 #define DMA_CHXCTL_ERRIE BIT(3) /*!< enable bit for … macro
406 #define DMA_INT_ERR DMA_CHXCTL_ERRIE /*!< ena…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_dma.c694 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_dma.c631 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_dma.c635 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_dma.c628 interrupt_enable = DMA_CHCTL(dma_periph, (uint32_t)channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_dma.c521 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_dma.c596 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()