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Searched refs:DMA_CHXCTL_CMEN (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_dma.c172 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CMEN; in dma_single_data_mode_init()
174 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CMEN; in dma_single_data_mode_init()
242 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CMEN; in dma_multi_data_mode_init()
244 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CMEN; in dma_multi_data_mode_init()
498 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CMEN; in dma_circulation_enable()
512 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CMEN; in dma_circulation_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_dma.c150 DMA_CHCTL(channelx) |= DMA_CHXCTL_CMEN; in dma_circulation_enable()
163 DMA_CHCTL(channelx) &= ~DMA_CHXCTL_CMEN; in dma_circulation_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_dma.c180 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CMEN; in dma_circulation_enable()
199 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CMEN; in dma_circulation_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_dma.c176 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CMEN; in dma_circulation_enable()
195 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CMEN; in dma_circulation_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_dma.c177 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CMEN; in dma_circulation_enable()
196 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CMEN; in dma_circulation_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_dma.c171 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CMEN; in dma_circulation_enable()
190 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CMEN; in dma_circulation_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_dma.c174 DMA_CHCTL(channelx) |= DMA_CHXCTL_CMEN; in dma_circulation_enable()
187 DMA_CHCTL(channelx) &= ~DMA_CHXCTL_CMEN; in dma_circulation_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_dma.c192 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CMEN; in dma_circulation_enable()
206 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CMEN; in dma_circulation_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_dma.h96 #define DMA_CHXCTL_CMEN BIT(5) /*!< circulation mode */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_dma.h104 #define DMA_CHXCTL_CMEN BIT(5) /*!< circular mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_dma.h104 #define DMA_CHXCTL_CMEN BIT(5) /*!< circular mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_dma.h98 #define DMA_CHXCTL_CMEN BIT(5) /*!< circular mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_dma.h104 #define DMA_CHXCTL_CMEN BIT(5) /*!< circular mode enable */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_dma.h131 #define DMA_CHXCTL_CMEN BIT(8) /*!< circulation mode */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_dma.h111 #define DMA_CHXCTL_CMEN BIT(5) … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_dma.h121 #define DMA_CHXCTL_CMEN BIT(5) /*!< circulation mod… macro