| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_dma.c | 50 DMA_CHCTL(channelx) &= ~DMA_CHXCTL_CHEN; in dma_deinit()
202 DMA_CHCTL(channelx) |= DMA_CHXCTL_CHEN; in dma_channel_enable()
215 DMA_CHCTL(channelx) &= ~DMA_CHXCTL_CHEN; in dma_channel_disable()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_dma.c | 62 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_deinit()
256 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CHEN; in dma_channel_enable()
275 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_channel_disable()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/ |
| D | gd32f403_dma.c | 62 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_deinit()
252 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CHEN; in dma_channel_enable()
271 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_channel_disable()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_dma.c | 63 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_deinit()
253 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CHEN; in dma_channel_enable()
272 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_channel_disable()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_dma.c | 61 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_deinit()
247 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CHEN; in dma_channel_enable()
266 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_channel_disable()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_dma.c | 51 DMA_CHCTL(channelx) &= ~DMA_CHXCTL_CHEN; in dma_deinit()
226 DMA_CHCTL(channelx) |= DMA_CHXCTL_CHEN; in dma_channel_enable()
239 DMA_CHCTL(channelx) &= ~DMA_CHXCTL_CHEN; in dma_channel_disable()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_dma.c | 53 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_deinit()
248 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CHEN; in dma_channel_enable()
262 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_channel_disable()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_dma.c | 54 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_deinit()
526 DMA_CHCTL(dma_periph, channelx) |= DMA_CHXCTL_CHEN; in dma_channel_enable()
540 DMA_CHCTL(dma_periph, channelx) &= ~DMA_CHXCTL_CHEN; in dma_channel_disable()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/ |
| D | gd32f3x0_dma.h | 91 #define DMA_CHXCTL_CHEN BIT(0) /*!< channel x enable */ macro
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/ |
| D | gd32f403_dma.h | 99 #define DMA_CHXCTL_CHEN BIT(0) /*!< channel enable */ macro
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/ |
| D | gd32vf103_dma.h | 99 #define DMA_CHXCTL_CHEN BIT(0) /*!< channel enable */ macro
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/ |
| D | gd32e10x_dma.h | 93 #define DMA_CHXCTL_CHEN BIT(0) /*!< channel enable */ macro
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_dma.h | 99 #define DMA_CHXCTL_CHEN BIT(0) /*!< channel enable */ macro
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_dma.h | 124 #define DMA_CHXCTL_CHEN BIT(0) /*!< channel x enable */ macro
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/ |
| D | gd32l23x_dma.h | 106 #define DMA_CHXCTL_CHEN BIT(0) … macro
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/ |
| D | gd32a50x_dma.h | 116 #define DMA_CHXCTL_CHEN BIT(0) /*!< channel x enabl… macro
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