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Searched refs:DMA_CH4PADDR (Results 1 – 8 of 8) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_dma.h66 #define DMA_CH4PADDR REG32(DMA + 0x00000060U) /*!< DMA channel 4 peripheral… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_dma.h72 #define DMA_CH4PADDR(dmax) REG32((dmax) + 0x60U) /*!< DMA channel 4 peripheral base… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_dma.h72 #define DMA_CH4PADDR(dmax) REG32((dmax) + 0x60U) /*!< DMA channel 4 peripheral base… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_dma.h68 #define DMA_CH4PADDR(dmax) REG32((dmax) + 0x60U) /*!< DMA channel 4 peripheral base … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_dma.h72 #define DMA_CH4PADDR(dmax) REG32((dmax) + 0x00000060U) /*!< DMA channel 4 periphera… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_dma.h82 #define DMA_CH4PADDR(dmax) REG32((dmax) + 0x00000078U) /*!< DMA channel 4 pe… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_dma.h65 #define DMA_CH4PADDR REG32(DMA + 0x00000060U) … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_dma.h67 #define DMA_CH4PADDR(dmax) REG32((dmax) + 0x00000060U) /*!< DMA channel 4 p… macro