Home
last modified time | relevance | path

Searched refs:DMA_CH3PADDR (Results 1 – 8 of 8) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_dma.h62 #define DMA_CH3PADDR REG32(DMA + 0x0000004CU) /*!< DMA channel 3 peripheral… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_dma.h67 #define DMA_CH3PADDR(dmax) REG32((dmax) + 0x4CU) /*!< DMA channel 3 peripheral base… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_dma.h67 #define DMA_CH3PADDR(dmax) REG32((dmax) + 0x4CU) /*!< DMA channel 3 peripheral base… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_dma.h64 #define DMA_CH3PADDR(dmax) REG32((dmax) + 0x4CU) /*!< DMA channel 3 peripheral base … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_dma.h67 #define DMA_CH3PADDR(dmax) REG32((dmax) + 0x0000004CU) /*!< DMA channel 3 periphera… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_dma.h75 #define DMA_CH3PADDR(dmax) REG32((dmax) + 0x00000060U) /*!< DMA channel 3 pe… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_dma.h61 #define DMA_CH3PADDR REG32(DMA + 0x0000004CU) … macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_dma.h63 #define DMA_CH3PADDR(dmax) REG32((dmax) + 0x0000004CU) /*!< DMA channel 3 p… macro