Searched refs:DBG_IDX_CTL0 (Results 1 – 4 of 4) sorted by relevance
| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/ |
| D | gd32f403_dbg.h | 92 DBG_IDX_CTL0 = 0x04U enumerator
97 …DBG_FWDGT_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 8U), /*!< debug FWDGT…
98 …DBG_WWDGT_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 9U), /*!< debug WWDGT…
99 …DBG_TIMER0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 10U), /*!< hold TIMER0…
100 …DBG_TIMER2_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 12U), /*!< hold TIMER2…
101 …DBG_TIMER3_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 13U), /*!< hold TIMER3…
102 …DBG_CAN0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 14U), /*!< debug CAN0 …
103 …DBG_I2C0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 15U), /*!< hold I2C0 s…
104 …DBG_I2C1_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 16U), /*!< hold I2C1 s…
105 …DBG_TIMER7_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 17U), /*!< hold TIMER7…
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/ |
| D | gd32l23x_dbg.h | 85 DBG_IDX_CTL0 = 0x04U, enumerator
91 DBG_FWDGT_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 8U), /*!< FWDGT hold bit */
92 DBG_WWDGT_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 9U), /*!< WWDGT hold bit */
93 DBG_TIMER1_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 12U), /*!< TIMER1 hold bit */
94 DBG_TIMER2_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 13U), /*!< TIMER2 hold bit */
95 DBG_I2C0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 15U), /*!< I2C0 hold bit */
96 DBG_I2C1_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 16U), /*!< I2C1 hold bit */
97 DBG_TIMER5_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 20U), /*!< TIMER5 hold bit */
98 DBG_TIMER6_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 21U), /*!< TIMER6 hold bit */
99 DBG_TIMER8_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 23U), /*!< TIMER8 hold bit */
[all …]
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/ |
| D | gd32f3x0_dbg.h | 89 …DBG_IDX_CTL0 = 0x04U, /*!< DBG control register… enumerator
96 …DBG_FWDGT_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 8U), /*!< debug FWDGT kept whe…
97 …DBG_WWDGT_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 9U), /*!< debug WWDGT kept whe…
98 …DBG_TIMER0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 10U), /*!< hold TIMER0 counter …
99 …DBG_TIMER1_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 11U), /*!< hold TIMER1 counter …
100 …DBG_TIMER2_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 12U), /*!< hold TIMER2 counter …
102 …DBG_TIMER5_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 19U), /*!< hold TIMER5 counter …
104 …DBG_TIMER13_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 27U), /*!< hold TIMER13 counter…
108 …DBG_I2C0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 15U), /*!< hold I2C0 smbus when…
109 …DBG_I2C1_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 16U), /*!< hold I2C1 smbus when…
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_dbg.h | 101 DBG_IDX_CTL0 = 0x04U, enumerator
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