Home
last modified time | relevance | path

Searched refs:DBG_CAN0_HOLD (Results 1 – 9 of 9) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_dbg.h80 …DBG_CAN0_HOLD = BIT(14), /*!< debug CAN0 kept when core is halted */ enumerator
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_dbg.h96 …DBG_CAN0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL, 22U), /*!< hold CAN0 co… enumerator
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_dbg.h102 …DBG_CAN0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL0, 14U), /*!< debug CAN0 … enumerator
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_dbg.h123 …DBG_CAN0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL1, 25U), /*!< debug CAN0 … enumerator
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_dbg.h111 …DBG_CAN0_HOLD = DBG_REGIDX_BIT(DBG_IDX_CTL, 14U), /*!< hold CAN0 re… enumerator
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_can.c885 dbg_periph_enable(DBG_CAN0_HOLD); in can_debug_freeze_enable()
899 dbg_periph_enable(DBG_CAN0_HOLD); in can_debug_freeze_enable()
924 dbg_periph_disable(DBG_CAN0_HOLD);
937 dbg_periph_disable(DBG_CAN0_HOLD);
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_can.c345 dbg_periph_enable(DBG_CAN0_HOLD); in can_debug_freeze_enable()
363 dbg_periph_disable(DBG_CAN0_HOLD); in can_debug_freeze_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_can.c347 dbg_periph_enable(DBG_CAN0_HOLD); in can_debug_freeze_enable()
366 dbg_periph_disable(DBG_CAN0_HOLD); in can_debug_freeze_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_can.c345 dbg_periph_enable(DBG_CAN0_HOLD); in can_debug_freeze_enable()
363 dbg_periph_disable(DBG_CAN0_HOLD); in can_debug_freeze_disable()