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Searched refs:DAC_CTL_DTEN0 (Results 1 – 8 of 8) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_dac.c225 DAC_CTL |= DAC_CTL_DTEN0; in dac_trigger_enable()
240 DAC_CTL &= ~DAC_CTL_DTEN0; in dac_trigger_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_dac.c235 DAC_CTL |= DAC_CTL_DTEN0; in dac_trigger_enable()
251 DAC_CTL &= ~DAC_CTL_DTEN0; in dac_trigger_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
Dgd32vf103_dac.c224 DAC_CTL |= DAC_CTL_DTEN0; in dac_trigger_enable()
239 DAC_CTL &= ~DAC_CTL_DTEN0; in dac_trigger_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_dac.c226 DAC_CTL |= DAC_CTL_DTEN0; in dac_trigger_enable()
241 DAC_CTL &= ~DAC_CTL_DTEN0; in dac_trigger_disable()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_dac.h67 #define DAC_CTL_DTEN0 BIT(2) /*!< DAC0 trigger enable/disable bit */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_dac.h66 #define DAC_CTL_DTEN0 BIT(2) /*!< DAC0 trigger enable/disable bit */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
Dgd32vf103_dac.h65 #define DAC_CTL_DTEN0 BIT(2) /*!< DAC0 trigger enable/disable bit */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_dac.h68 #define DAC_CTL_DTEN0 BIT(2) /*!< DAC0 trigger enable/disable bit */ macro