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Searched refs:CTC_CTL1_RLVALUE (Results 1 – 12 of 12) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_ctc.c195 CTC_CTL1 &= (uint32_t)(~CTC_CTL1_RLVALUE); in ctc_counter_reload_value_config()
238 reload_value = (uint16_t)(CTC_CTL1 & CTC_CTL1_RLVALUE); in ctc_counter_reload_value_read()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_ctc.c198 CTC_CTL1 &= (uint32_t)(~CTC_CTL1_RLVALUE); in ctc_counter_reload_value_config()
241 reload_value = (uint16_t)(CTC_CTL1 & CTC_CTL1_RLVALUE); in ctc_counter_reload_value_read()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
Dgd32f403_ctc.c197 CTC_CTL1 &= (uint32_t)(~CTC_CTL1_RLVALUE); in ctc_counter_reload_value_config()
240 reload_value = (uint16_t)(CTC_CTL1 & CTC_CTL1_RLVALUE); in ctc_counter_reload_value_read()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_ctc.c128 CTC_CTL1 &= (uint32_t)(~CTC_CTL1_RLVALUE); in ctc_counter_reload_value_config()
234 reload_value = (uint16_t)(CTC_CTL1 & CTC_CTL1_RLVALUE); in ctc_counter_reload_value_read()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
Dgd32e10x_ctc.c197 CTC_CTL1 &= (uint32_t)(~CTC_CTL1_RLVALUE); in ctc_counter_reload_value_config()
240 reload_value = (uint16_t)(CTC_CTL1 & CTC_CTL1_RLVALUE); in ctc_counter_reload_value_read()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_ctc.c212 CTC_CTL1 &= (uint32_t)(~CTC_CTL1_RLVALUE); in ctc_counter_reload_value_config()
255 reload_value = (uint16_t)(CTC_CTL1 & CTC_CTL1_RLVALUE); in ctc_counter_reload_value_read()
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_ctc.h61 #define CTC_CTL1_RLVALUE BITS(0,15) /*!< CTC counter reload value */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
Dgd32e10x_ctc.h64 #define CTC_CTL1_RLVALUE BITS(0,15) /*!< CTC counter reload value */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
Dgd32f403_ctc.h63 #define CTC_CTL1_RLVALUE BITS(0,15) /*!< CTC counter reload value */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_ctc.h63 #define CTC_CTL1_RLVALUE BITS(0,15) /*!< CTC counter reload value */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_ctc.h64 #define CTC_CTL1_RLVALUE BITS(0,15) /*!< CTC counter reload value */ macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_ctc.h63 #define CTC_CTL1_RLVALUE BITS(0,15) /*!< CTC counter reload value */ macro