CTC_CTL0_ERRIE (reference) in projects: hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0

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Searched refs:CTC_CTL0_ERRIE (Results 1 – 11 of 11) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
D	gd32l23x_ctc.h	`53 #define CTC_CTL0_ERRIE BIT(2) /!< error(ERRIF) interrupt enable / macro 113 #define CTC_INT_ERR CTC_CTL0_ERRIE /*!< error int…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
D	gd32e10x_ctc.h	`56 #define CTC_CTL0_ERRIE BIT(2) /!< error(ERRIF) interrupt enable / macro 115 #define CTC_INT_ERR CTC_CTL0_ERRIE /*!< error int…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
D	gd32f403_ctc.h	`55 #define CTC_CTL0_ERRIE BIT(2) /!< error(ERRIF) interrupt enable / macro 115 #define CTC_INT_ERR CTC_CTL0_ERRIE /*!< error int…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
D	gd32e50x_ctc.h	`55 #define CTC_CTL0_ERRIE BIT(2) /!< error(ERRIF) interrupt enable / macro 115 #define CTC_INT_ERR CTC_CTL0_ERRIE /*!< error int…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
D	gd32f4xx_ctc.h	`56 #define CTC_CTL0_ERRIE BIT(2) /!< error(ERRIF) interrupt enable / macro 121 #define CTC_INT_ERR CTC_CTL0_ERRIE /*!< error int…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
D	gd32f3x0_ctc.h	`55 #define CTC_CTL0_ERRIE BIT(2) /!< error(ERRIF) interrupt enable / macro 120 #define CTC_INT_ERR CTC_CTL0_ERRIE /*!< error in…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
D	gd32l23x_ctc.c	`307 intenable = CTC_CTL0 & CTC_CTL0_ERRIE; in ctc_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
D	gd32e50x_ctc.c	`356 intenable = CTC_CTL0 & CTC_CTL0_ERRIE; in ctc_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
D	gd32f403_ctc.c	`309 intenable = CTC_CTL0 & CTC_CTL0_ERRIE; in ctc_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
D	gd32e10x_ctc.c	`309 intenable = CTC_CTL0 & CTC_CTL0_ERRIE; in ctc_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
D	gd32f4xx_ctc.c	`324 intenable = CTC_CTL0 & CTC_CTL0_ERRIE; in ctc_interrupt_flag_get()`

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TraceRecorderSource-3.4.0
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