CTC_CTL0_AUTOTRIM (reference) in projects: hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0

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Searched refs:CTC_CTL0_AUTOTRIM (Results 1 – 12 of 12) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
D	gd32l23x_ctc.h	`56 #define CTC_CTL0_AUTOTRIM BIT(6) /!< hardware automatically trim mod… macro 86 #define CTC_HARDWARE_TRIM_MODE_ENABLE CTC_CTL0_AUTOTRIM /!< hardware …`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
D	gd32e10x_ctc.h	`59 #define CTC_CTL0_AUTOTRIM BIT(6) /!< hardware automatically trim mod… macro 89 #define CTC_HARDWARE_TRIM_MODE_ENABLE CTC_CTL0_AUTOTRIM /!< hardware…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
D	gd32f403_ctc.h	`58 #define CTC_CTL0_AUTOTRIM BIT(6) /!< hardware automatically trim mod… macro 88 #define CTC_HARDWARE_TRIM_MODE_ENABLE CTC_CTL0_AUTOTRIM /!< hardware …`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
D	gd32e50x_ctc.h	`58 #define CTC_CTL0_AUTOTRIM BIT(6) /!< hardware automatically trim mod… macro 88 #define CTC_HARDWARE_TRIM_MODE_ENABLE CTC_CTL0_AUTOTRIM /!< hardware…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
D	gd32f4xx_ctc.h	`59 #define CTC_CTL0_AUTOTRIM BIT(6) /!< hardware automatically trim mod… macro 90 #define CTC_HARDWARE_TRIM_MODE_ENABLE CTC_CTL0_AUTOTRIM /!< hardware…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
D	gd32f3x0_ctc.h	`58 #define CTC_CTL0_AUTOTRIM BIT(6) /!< hardware automatically trim mod… macro 93 #define CTC_HARDWARE_TRIM_MODE_ENABLE CTC_CTL0_AUTOTRIM /!< hardware…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
D	gd32l23x_ctc.c	`117 CTC_CTL0 &= (uint32_t)(~CTC_CTL0_AUTOTRIM); in ctc_hardware_trim_mode_config()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
D	gd32e50x_ctc.c	`121 CTC_CTL0 &= (uint32_t)(~CTC_CTL0_AUTOTRIM); in ctc_hardware_trim_mode_config()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
D	gd32f403_ctc.c	`119 CTC_CTL0 &= (uint32_t)(~CTC_CTL0_AUTOTRIM); in ctc_hardware_trim_mode_config()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
D	gd32f3x0_ctc.c	`191 CTC_CTL0 &= (uint32_t)(~CTC_CTL0_AUTOTRIM); in ctc_hardware_trim_mode_config()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
D	gd32e10x_ctc.c	`120 CTC_CTL0 &= (uint32_t)(~CTC_CTL0_AUTOTRIM); in ctc_hardware_trim_mode_config()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
D	gd32f4xx_ctc.c	`120 CTC_CTL0 &= (uint32_t)(~CTC_CTL0_AUTOTRIM); in ctc_hardware_trim_mode_config()`

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