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Searched refs:CAN_FDCTL (Results 1 – 4 of 4) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_can.c404 CAN_FDCTL(can_periph) &= ~CAN_FDCTL_TDCEN; in can_operation_mode_enter()
549 CAN_FDCTL(can_periph) &= ~(CAN_FDCTL_BRSEN | CAN_FDCTL_MDSZ | CAN_FDCTL_TDCEN | CAN_FDCTL_TDCO); in can_fd_config()
559 CAN_FDCTL(can_periph) |= CAN_FDCTL_TDCEN; in can_fd_config()
563 CAN_FDCTL(can_periph) |= CAN_FDCTL_BRSEN; in can_fd_config()
567 CAN_FDCTL(can_periph) |= can_fd_para_init->mailbox_data_size; in can_fd_config()
575 CAN_FDCTL(can_periph) |= FDCTL_TDCO(can_fd_para_init->tdc_offset); in can_fd_config()
586 CAN_FDCTL(can_periph) |= CAN_FDCTL_BRSEN; in can_bitrate_switch_enable()
597 CAN_FDCTL(can_periph) &= ~CAN_FDCTL_BRSEN; in can_bitrate_switch_disable()
610 reg = CAN_FDCTL(can_periph); in can_tdc_get()
623 CAN_FDCTL(can_periph) |= CAN_FDCTL_TDCEN; in can_tdc_enable()
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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_can.c319 fdctl_status = CAN_FDCTL(can_periph); in can_init()
323 CAN_FDCTL(can_periph) = fdctl_status; in can_init()
330 CAN_FDCTL(can_periph) = fdctl_status; in can_init()
706 CAN_FDCTL(can_periph) = tempreg; in can_fd_init()
742 fdctl_status = CAN_FDCTL(can_periph); in can_frequency_set()
746 CAN_FDCTL(can_periph) = fdctl_status; in can_frequency_set()
749 CAN_FDCTL(can_periph) = fdctl_status; in can_frequency_set()
802 CAN_FDCTL(can_periph) |= CAN_FDCTL_FDEN; in can_fd_function_enable()
814 CAN_FDCTL(can_periph) &= ~CAN_FDCTL_FDEN; in can_fd_function_disable()
1053 canfd_en = CAN_FDCTL(can_periph) & CAN_FDCTL_FDEN;
[all …]
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_can.h57 #define CAN_FDCTL(canx) REG32((canx) + 0x00000020U) /*!< CAN FD control r… macro
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_can.h118 #define CAN_FDCTL(canx) REG32((canx) + 0x00000C00U) /*!< CAN F… macro