ADC_CTL1_CLB (reference) in projects: hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0

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Searched refs:ADC_CTL1_CLB (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
D	gd32f3x0_adc.c	`90 ADC_CTL1 \|= ADC_CTL1_CLB; in adc_calibration_enable() 92 while((ADC_CTL1 & ADC_CTL1_CLB)){ in adc_calibration_enable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
D	gd32l23x_adc.c	`113 ADC_CTL1 \|= ADC_CTL1_CLB; in adc_calibration_enable() 115 while((ADC_CTL1 & ADC_CTL1_CLB)) { in adc_calibration_enable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
D	gd32f403_adc.c	`107 ADC_CTL1(adc_periph) \|= ADC_CTL1_CLB; in adc_calibration_enable() 109 while((ADC_CTL1(adc_periph) & ADC_CTL1_CLB)){ in adc_calibration_enable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
D	gd32a50x_adc.c	`97 ADC_CTL1(adc_periph) \|= ADC_CTL1_CLB; in adc_calibration_enable() 99 while((ADC_CTL1(adc_periph) & ADC_CTL1_CLB)){ in adc_calibration_enable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
D	gd32e10x_adc.c	`213 ADC_CTL1(adc_periph) \|= ADC_CTL1_CLB; in adc_calibration_enable() 215 while(RESET != (ADC_CTL1(adc_periph) & ADC_CTL1_CLB)){ in adc_calibration_enable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
D	gd32vf103_adc.c	`211 ADC_CTL1(adc_periph) \|= ADC_CTL1_CLB; in adc_calibration_enable() 213 while((uint32_t)RESET != (ADC_CTL1(adc_periph) & ADC_CTL1_CLB)){ in adc_calibration_enable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
D	gd32e50x_adc.c	`105 ADC_CTL1(adc_periph) \|= ADC_CTL1_CLB; in adc_calibration_enable() 107 while((ADC_CTL1(adc_periph) & ADC_CTL1_CLB)){ in adc_calibration_enable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
D	gd32f4xx_adc.c	`201 ADC_CTL1(adc_periph) \|= ADC_CTL1_CLB; in adc_calibration_enable() 203 while(RESET != (ADC_CTL1(adc_periph) & ADC_CTL1_CLB)) { in adc_calibration_enable()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
D	gd32f3x0_adc.h	`94 #define ADC_CTL1_CLB BIT(2) /!< ADC calibration / macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
D	gd32l23x_adc.h	`93 #define ADC_CTL1_CLB BIT(2) /*!< ADC calibr… macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
D	gd32e10x_adc.h	`96 #define ADC_CTL1_CLB BIT(2) /!< ADC calibration / macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
D	gd32f403_adc.h	`97 #define ADC_CTL1_CLB BIT(2) /!< ADC calibration / macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
D	gd32vf103_adc.h	`94 #define ADC_CTL1_CLB BIT(2) /!< ADC calibration / macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
D	gd32a50x_adc.h	`97 #define ADC_CTL1_CLB BIT(2) /!< ADC calibration / macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
D	gd32f4xx_adc.h	`102 #define ADC_CTL1_CLB BIT(2) /!< ADC calibration / macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
D	gd32e50x_adc.h	`107 #define ADC_CTL1_CLB BIT(2) /!< ADC calibration / macro`

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