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Searched refs:uint32_t (Results 1 – 10 of 10) sorted by relevance

/hal_ethos_u-3.6.0-3.5.0-3.4.0/src/
Dethosu65_interface.h2487 uint32_t version_status : 4; // This is the version of the product
2488 uint32_t version_minor : 4; // This is the n for the P part of an RnPn release number
2489 uint32_t version_major : 4; // This is the n for the R part of an RnPn release number
2490 uint32_t product_major : 4; // Product major ID number (unique per base product)
2491 uint32_t arch_patch_rev : 4; // This is the patch number of the architecture version a.b
2492 uint32_t
2494 uint32_t
2497 uint32_t word;
2501 uint32_t word0;
2505 CONSTEXPR id_r(uint32_t init) : word0(init) {}
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Dethosu55_interface.h2491 uint32_t version_status : 4; // This is the version of the product
2492 uint32_t version_minor : 4; // This is the n for the P part of an RnPn release number
2493 uint32_t version_major : 4; // This is the n for the R part of an RnPn release number
2494 uint32_t product_major : 4; // Product major ID number (unique per base product)
2495 uint32_t arch_patch_rev : 4; // This is the patch number of the architecture version a.b
2496 uint32_t
2498 uint32_t
2501 uint32_t word;
2505 uint32_t word0;
2509 CONSTEXPR id_r(uint32_t init) : word0(init) {}
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Dethosu_pmu.c59 static enum ethosu_pmu_event_type pmu_event_type(uint32_t id) in pmu_event_type()
71 static uint32_t pmu_event_value(enum ethosu_pmu_event_type event) in pmu_event_value()
80 return (uint32_t)(-1); in pmu_event_value()
104 uint32_t ETHOSU_PMU_Get_NumEventCounters(void) in ETHOSU_PMU_Get_NumEventCounters()
109 void ETHOSU_PMU_Set_EVTYPER(struct ethosu_driver *drv, uint32_t num, enum ethosu_pmu_event_type typ… in ETHOSU_PMU_Set_EVTYPER()
112 uint32_t val = pmu_event_value(type); in ETHOSU_PMU_Set_EVTYPER()
117 enum ethosu_pmu_event_type ETHOSU_PMU_Get_EVTYPER(struct ethosu_driver *drv, uint32_t num) in ETHOSU_PMU_Get_EVTYPER()
120 uint32_t val = drv->dev->reg->PMEVTYPER[num].word; in ETHOSU_PMU_Get_EVTYPER()
144 void ETHOSU_PMU_CNTR_Enable(struct ethosu_driver *drv, uint32_t mask) in ETHOSU_PMU_CNTR_Enable()
150 void ETHOSU_PMU_CNTR_Disable(struct ethosu_driver *drv, uint32_t mask) in ETHOSU_PMU_CNTR_Disable()
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Dethosu_driver.c100 uint32_t word;
108 uint32_t cfg;
109 uint32_t id;
129 void __attribute__((weak)) ethosu_flush_dcache(uint32_t *p, size_t bytes) in ethosu_flush_dcache()
139 void __attribute__((weak)) ethosu_invalidate_dcache(uint32_t *p, size_t bytes) in ethosu_invalidate_dcache()
307 uint32_t cms_bytes = cms_length * BYTES_IN_32_BITS; in handle_command_stream()
335 ethosu_flush_dcache((uint32_t *)cmd_stream_ptr, cms_bytes); in handle_command_stream()
338 … ethosu_flush_dcache((uint32_t *)(uintptr_t)drv->job.base_addr[i], drv->job.base_addr_size[i]); in handle_command_stream()
388 uint32_t secure_enable, in ethosu_init()
389 uint32_t privilege_enable) in ethosu_init()
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Dethosu_device.h51 uint32_t secure;
52 uint32_t privileged;
62 struct ethosu_device *ethosu_dev_init(const void *base_address, uint32_t secure_enable, uint32_t pr…
87 uint32_t cms_length,
136 bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_in, uint32_t id_in);
Dethosu_device_u55_u65.c52 struct ethosu_device *ethosu_dev_init(const void *base_address, uint32_t secure_enable, uint32_t pr… in ethosu_dev_init()
143 uint32_t cms_length, in ethosu_dev_run_command_stream()
297 bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_in, uint32_t id_in) in ethosu_dev_verify_optimizer_config()
/hal_ethos_u-3.6.0-3.5.0-3.4.0/include/
Dpmu_ethosu.h154 void ETHOSU_PMU_Set_EVTYPER(struct ethosu_driver *drv, uint32_t num, enum ethosu_pmu_event_type typ…
160 uint32_t ETHOSU_PMU_Get_NumEventCounters(void);
167 enum ethosu_pmu_event_type ETHOSU_PMU_Get_EVTYPER(struct ethosu_driver *drv, uint32_t num);
186 void ETHOSU_PMU_CNTR_Enable(struct ethosu_driver *drv, uint32_t mask);
195 void ETHOSU_PMU_CNTR_Disable(struct ethosu_driver *drv, uint32_t mask);
207 uint32_t ETHOSU_PMU_CNTR_Status(struct ethosu_driver *drv);
234 uint32_t ETHOSU_PMU_Get_EVCNTR(struct ethosu_driver *drv, uint32_t num);
242 void ETHOSU_PMU_Set_EVCNTR(struct ethosu_driver *drv, uint32_t num, uint32_t val);
250 uint32_t ETHOSU_PMU_Get_CNTR_OVS(struct ethosu_driver *drv);
259 void ETHOSU_PMU_Set_CNTR_OVS(struct ethosu_driver *drv, uint32_t mask);
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Dethosu_types.h55 uint32_t version_status; ///< Version status
56 uint32_t version_minor; ///< Version minor
57 uint32_t version_major; ///< Version major
58 uint32_t product_major; ///< Product major
59 uint32_t arch_patch_rev; ///< Architecture version patch
60 uint32_t arch_minor_rev; ///< Architecture version minor
61 uint32_t arch_major_rev; ///< Architecture version major
66 uint32_t macs_per_cc; ///< MACs per clock cycle
67 uint32_t cmd_stream_version; ///< NPU command stream version
68 uint32_t custom_dma; ///< Custom DMA enabled
Dethosu_driver.h77 uint32_t power_request_counter;
109 void ethosu_flush_dcache(uint32_t *p, size_t bytes);
114 void ethosu_invalidate_dcache(uint32_t *p, size_t bytes);
150 uint32_t secure_enable,
151 uint32_t privilege_enable);
/hal_ethos_u-3.6.0-3.5.0-3.4.0/
DREADME.md138 void ethosu_flush_dcache(uint32_t *p, size_t bytes) {
145 void ethosu_invalidate_dcache(uint32_t *p, size_t bytes) {