/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32c3/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 166 self.write_reg(r, 0) 184 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 185 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 192 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 197 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32c5/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 166 self.write_reg(r, 0) 184 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 185 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 192 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 197 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32c5beta3/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 166 self.write_reg(r, 0) 184 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 185 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 192 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 197 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32c6/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 166 self.write_reg(r, 0) 184 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 185 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 192 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 197 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32c61/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 166 self.write_reg(r, 0) 184 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 185 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 192 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 197 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32h2/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 166 self.write_reg(r, 0) 184 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 185 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 192 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 197 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32h2beta1/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 166 self.write_reg(r, 0) 184 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 185 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 192 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 197 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32p4/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 167 self.write_reg(r, 0) 185 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 186 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 193 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 198 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32s2/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32s3/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32s3beta2/ |
D | emulate_efuse_controller.py | 25 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 55 self.write_reg(addr, 0) 56 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 58 self.write_reg(addr, 0) 59 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32/ |
D | emulate_efuse_controller.py | 55 self.write_reg(self.REGS.EFUSE_REG_CMD, self.REGS.EFUSE_CMD_WRITE) 57 self.write_reg(self.REGS.EFUSE_REG_CONF, self.REGS.EFUSE_CONF_READ) 58 self.write_reg(self.REGS.EFUSE_REG_CMD, self.REGS.EFUSE_CMD_READ) 64 self.write_reg(addr, 0) 69 self.write_reg(addr, 0)
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/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32c2/ |
D | emulate_efuse_controller.py | 27 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 57 self.write_reg(addr, 0) 58 self.write_reg(self.REGS.EFUSE_CMD_REG, 0) 60 self.write_reg(addr, 0) 61 self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
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D | fields.py | 158 self.write_reg(r, 0) 176 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_WRITE_OP_CODE) 177 self.write_reg(self.REGS.EFUSE_CMD_REG, self.REGS.EFUSE_PGM_CMD | (block << 2)) 184 self.write_reg(self.REGS.EFUSE_CONF_REG, self.REGS.EFUSE_READ_OP_CODE) 189 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/esptool/targets/ |
D | esp32c3.py | 238 self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, self.RTC_CNTL_WDT_WKEY) 239 self.write_reg(self.RTC_CNTL_WDTCONFIG0_REG, 0) 240 self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, 0) 243 self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, self.RTC_CNTL_SWD_WKEY) 244 self.write_reg( 249 self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, 0)
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D | esp32s3.py | 329 self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, self.RTC_CNTL_WDT_WKEY) 330 self.write_reg(self.RTC_CNTL_WDTCONFIG0_REG, 0) 331 self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, 0) 334 self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, self.RTC_CNTL_SWD_WKEY) 335 self.write_reg( 340 self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, 0) 378 self.write_reg(
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/hal_espressif-latest/tools/esptool_py/esptool/ |
D | loader.py | 813 def write_reg(self, addr, value, mask=0xFFFFFFFF, delay_us=0, delay_after_us=0): member in ESPLoader 835 self.write_reg(addr, val) 1344 self.write_reg(SPI_MOSI_DLEN_REG, mosi_bits - 1) 1346 self.write_reg(SPI_MISO_DLEN_REG, miso_bits - 1) 1353 self.write_reg(SPI_USR1_REG, flags) 1370 self.write_reg(SPI_DATA_LEN_REG, flags) 1403 self.write_reg(SPI_USR_REG, flags) 1404 self.write_reg( 1410 self.write_reg(SPI_ADDR_REG, addr) 1412 self.write_reg(SPI_W0_REG, 0) # clear data register before we read it [all …]
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